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| author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-10-24 22:31:22 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-10-24 22:32:55 +0200 |
| commit | 04ec7df7085b71894f18668c5164370547eb2e76 (patch) | |
| tree | a0fb30fa29c8613f4390a8cbfd2787ba5c177359 /target-microblaze/translate.c | |
| parent | fc8ead74674b7129e8f31c2595c76658e5622197 (diff) | |
| download | qemu-04ec7df7085b71894f18668c5164370547eb2e76.tar.gz qemu-04ec7df7085b71894f18668c5164370547eb2e76.tar.bz2 qemu-04ec7df7085b71894f18668c5164370547eb2e76.zip | |
microblaze: Clarify expected input of write_carry
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze/translate.c')
| -rw-r--r-- | target-microblaze/translate.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 1b937b3f0d..76b25704ba 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -150,6 +150,10 @@ static void read_carry(DisasContext *dc, TCGv d) tcg_gen_shri_tl(d, cpu_SR[SR_MSR], 31); } +/* + * write_carry sets the carry bits in MSR based on bit 0 of v. + * v[31:1] are ignored. + */ static void write_carry(DisasContext *dc, TCGv v) { TCGv t0 = tcg_temp_new(); |