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| author | Andreas Färber <afaerber@suse.de> | 2012-12-17 06:18:02 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-01-15 04:09:13 +0100 |
| commit | 55e5c2850293547203874098f7cec148ffd12dfa (patch) | |
| tree | f9a9cc316999b7b52726b5186a925022b3747daa /target-i386/misc_helper.c | |
| parent | 1b1ed8dc40635d60dd95c04658989af63542fcbf (diff) | |
| download | qemu-55e5c2850293547203874098f7cec148ffd12dfa.tar.gz qemu-55e5c2850293547203874098f7cec148ffd12dfa.tar.bz2 qemu-55e5c2850293547203874098f7cec148ffd12dfa.zip | |
cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using a
negative offset. Therefore the field is placed last in CPUState.
Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.
Move common parts of mips cpu_state_reset() to mips_cpu_reset().
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
[AF: Rebased onto ppc CPU subclasses and openpic changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-i386/misc_helper.c')
| -rw-r--r-- | target-i386/misc_helper.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index db3126b79b..719cacda8f 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -580,14 +580,17 @@ void helper_monitor(CPUX86State *env, target_ulong ptr) void helper_mwait(CPUX86State *env, int next_eip_addend) { + CPUState *cpu; + if ((uint32_t)ECX != 0) { raise_exception(env, EXCP0D_GPF); } cpu_svm_check_intercept_param(env, SVM_EXIT_MWAIT, 0); EIP += next_eip_addend; + cpu = CPU(x86_env_get_cpu(env)); /* XXX: not complete but not completely erroneous */ - if (env->cpu_index != 0 || env->next_cpu != NULL) { + if (cpu->cpu_index != 0 || env->next_cpu != NULL) { /* more than one CPU: do not sleep because another CPU may wake this one */ } else { |