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author | Andreas Färber <afaerber@suse.de> | 2013-02-02 10:57:51 +0100 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:55 +0100 |
commit | 97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0 (patch) | |
tree | 6c9121e0571f75c8f5479e0027589f0d2f0178c7 /target-arm | |
parent | c3affe5670e5d0df8a7e06f1d6e80853633146df (diff) | |
download | qemu-97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0.tar.gz qemu-97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0.tar.bz2 qemu-97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0.zip |
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
This removes a global per-target function and thus takes us one step
closer to compiling multiple targets into one executable.
It will also allow to override the interrupt handling for certain CPU
families.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-arm')
-rw-r--r-- | target-arm/cpu-qom.h | 2 | ||||
-rw-r--r-- | target-arm/cpu.c | 1 | ||||
-rw-r--r-- | target-arm/cpu.h | 1 | ||||
-rw-r--r-- | target-arm/helper.c | 11 |
4 files changed, 10 insertions, 5 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 7539727768..eeecc9265d 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -113,4 +113,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) void register_cp_regs_for_features(ARMCPU *cpu); +void arm_cpu_do_interrupt(CPUState *cpu); + #endif diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 5dfcb740d9..aeaa3b7834 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -802,6 +802,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->reset = arm_cpu_reset; cc->class_by_name = arm_cpu_class_by_name; + cc->do_interrupt = arm_cpu_do_interrupt; } static void cpu_register(const ARMCPUInfo *info) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 957866c0e2..2b97221209 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -236,7 +236,6 @@ ARMCPU *cpu_arm_init(const char *cpu_model); void arm_translate_init(void); void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu); int cpu_arm_exec(CPUARMState *s); -void do_interrupt(CPUARMState *); int bank_number(int mode); void switch_mode(CPUARMState *, int); uint32_t do_arm_semihosting(CPUARMState *env); diff --git a/target-arm/helper.c b/target-arm/helper.c index f839726f52..b4cbb8718a 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1567,8 +1567,11 @@ uint32_t HELPER(rbit)(uint32_t x) #if defined(CONFIG_USER_ONLY) -void do_interrupt (CPUARMState *env) +void arm_cpu_do_interrupt(CPUState *cs) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + env->exception_index = -1; } @@ -1799,9 +1802,10 @@ static void do_interrupt_v7m(CPUARMState *env) } /* Handle a CPU exception. */ -void do_interrupt(CPUARMState *env) +void arm_cpu_do_interrupt(CPUState *cs) { - CPUState *cs; + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; uint32_t addr; uint32_t mask; int new_mode; @@ -1908,7 +1912,6 @@ void do_interrupt(CPUARMState *env) } env->regs[14] = env->regs[15] + offset; env->regs[15] = addr; - cs = CPU(arm_env_get_cpu(env)); cs->interrupt_request |= CPU_INTERRUPT_EXITTB; } |