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authorPranith Kumar <bobby.prani@gmail.com>2016-07-14 16:20:23 -0400
committerRichard Henderson <rth@twiddle.net>2016-09-16 08:12:12 -0700
commit61e4c432ab26526bab0f3ef746c1861415b6da29 (patch)
treec10cca88fc8897b0c4c0a4b92087ce6c25f497c8 /target-arm
parentae2264d526ee60b57acad247292e2da4ee822eff (diff)
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target-arm: Generate fences in ARMv7 frontend
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com> Message-Id: <20160714202026.9727-12-bobby.prani@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index bd5d5cb576..693d4bc6a2 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8083,7 +8083,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
case 4: /* dsb */
case 5: /* dmb */
ARCH(7);
- /* We don't emulate caches so these are a no-op. */
+ tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
return;
case 6: /* isb */
/* We need to break the TB after this insn to execute
@@ -10432,7 +10432,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
break;
case 4: /* dsb */
case 5: /* dmb */
- /* These execute as NOPs. */
+ tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
break;
case 6: /* isb */
/* We need to break the TB after this insn