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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2013-12-17 19:42:25 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-17 19:42:25 +0000 |
| commit | 9d935509fdb48e47cc46e81d2b9d466b18b546ba (patch) | |
| tree | 90d42d5f564146e21609e72ca8b9445356519fbe /target-arm/cpu.h | |
| parent | f46e720a82ccdf1a521cf459448f3f96ed895d43 (diff) | |
| download | qemu-9d935509fdb48e47cc46e81d2b9d466b18b546ba.tar.gz qemu-9d935509fdb48e47cc46e81d2b9d466b18b546ba.tar.bz2 qemu-9d935509fdb48e47cc46e81d2b9d466b18b546ba.zip | |
target-arm: add support for v8 AES instructions
This adds support for the AESE/AESD/AESMC/AESIMC instructions that
are available on some v8 implementations of Aarch32.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 1386266078-6976-1-git-send-email-ard.biesheuvel@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index c3f007fc53..00fd80d3a7 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -467,6 +467,7 @@ enum arm_features { ARM_FEATURE_LPAE, /* has Large Physical Address Extension */ ARM_FEATURE_V8, ARM_FEATURE_AARCH64, /* supports 64 bit mode */ + ARM_FEATURE_V8_AES, /* implements AES part of v8 Crypto Extensions */ }; static inline int arm_feature(CPUARMState *env, int feature) |