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author | Andreas Färber <afaerber@suse.de> | 2013-06-28 23:18:47 +0200 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-07-26 23:23:54 +0200 |
commit | a0e372f0c49ac01faeaeb73a6e8f50e8ac615f34 (patch) | |
tree | 0a87f5f9ab3ff51ef996c69ded7cfa8f97768e92 /qom | |
parent | 19a77215f1ba966c4d37dadec45f38be789b8529 (diff) | |
download | qemu-a0e372f0c49ac01faeaeb73a6e8f50e8ac615f34.tar.gz qemu-a0e372f0c49ac01faeaeb73a6e8f50e8ac615f34.tar.bz2 qemu-a0e372f0c49ac01faeaeb73a6e8f50e8ac615f34.zip |
cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs
CPUState::gdb_num_regs replaces num_g_regs.
CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS.
Allows building gdb_register_coprocessor() for xtensa, too.
As a side effect this should fix coprocessor register numbering for SMP.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'qom')
-rw-r--r-- | qom/cpu.c | 9 |
1 files changed, 9 insertions, 0 deletions
@@ -226,6 +226,14 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp) } } +static void cpu_common_initfn(Object *obj) +{ + CPUState *cpu = CPU(obj); + CPUClass *cc = CPU_GET_CLASS(obj); + + cpu->gdb_num_regs = cc->gdb_num_core_regs; +} + static int64_t cpu_common_get_arch_id(CPUState *cpu) { return cpu->cpu_index; @@ -253,6 +261,7 @@ static const TypeInfo cpu_type_info = { .name = TYPE_CPU, .parent = TYPE_DEVICE, .instance_size = sizeof(CPUState), + .instance_init = cpu_common_initfn, .abstract = true, .class_size = sizeof(CPUClass), .class_init = cpu_class_init, |