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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-16 21:08:06 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-09-16 21:08:06 +0000 |
commit | 5fafdf24ef2c090c164d4dc89684b3f379dbdd87 (patch) | |
tree | c0654ee63b6dac76d98b427e92ef16850a90c652 /mips-dis.c | |
parent | bd494f4cbd4187dda8cc8f4739763f24a31a4c8b (diff) | |
download | qemu-5fafdf24ef2c090c164d4dc89684b3f379dbdd87.tar.gz qemu-5fafdf24ef2c090c164d4dc89684b3f379dbdd87.tar.bz2 qemu-5fafdf24ef2c090c164d4dc89684b3f379dbdd87.zip |
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'mips-dis.c')
-rw-r--r-- | mips-dis.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/mips-dis.c b/mips-dis.c index ff4d61c1ee..4331a8c558 100644 --- a/mips-dis.c +++ b/mips-dis.c @@ -392,10 +392,10 @@ struct mips_opcode "l" 32 bit floating point constant in .lit4 MDMX instruction operands (note that while these use the FP register - fields, they accept both $fN and $vN names for the registers): + fields, they accept both $fN and $vN names for the registers): "O" MDMX alignment offset (OP_*_ALN) "Q" MDMX vector/scalar/immediate source (OP_*_VSEL and OP_*_FT) - "X" MDMX destination register (OP_*_FD) + "X" MDMX destination register (OP_*_FD) "Y" MDMX source register (OP_*_FS) "Z" MDMX source register (OP_*_FT) @@ -1214,7 +1214,7 @@ extern const int bfd_mips16_num_opcodes; Because of the lookup algorithm used, entries with the same opcode name must be contiguous. - + Many instructions are short hand for other instructions (i.e., The jal <register> instruction is short for jalr <register>). */ @@ -3558,7 +3558,7 @@ print_insn_args (const char *d, lsb = ((l >> OP_SH_SHAMT) & OP_MASK_SHAMT) + 32; (*info->fprintf_func) (info->stream, "0x%x", lsb); break; - + case 'F': msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; (*info->fprintf_func) (info->stream, "0x%x", msb - lsb + 1); |