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author | Alistair Francis <alistair.francis@xilinx.com> | 2016-01-21 14:15:03 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-01-21 14:15:03 +0000 |
commit | 02d07eb49436aec8bd13b4ac7c63d9ca3f1c6e6c (patch) | |
tree | 25543134097e7a717089937d615d51b07356478f /include/hw | |
parent | 6363235b2bd49d31a04c0229ae95e5f415c52a54 (diff) | |
download | qemu-02d07eb49436aec8bd13b4ac7c63d9ca3f1c6e6c.tar.gz qemu-02d07eb49436aec8bd13b4ac7c63d9ca3f1c6e6c.tar.bz2 qemu-02d07eb49436aec8bd13b4ac7c63d9ca3f1c6e6c.zip |
xlnx-zynqmp: Connect the SPI devices
Connect the Xilinx SPI devices to the ZynqMP model.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
[ PC changes
* Use QOM alias for bus connectivity on SoC level
]
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
[PMM: free the g_strdup_printf() string when finished with it]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
-rw-r--r-- | include/hw/arm/xlnx-zynqmp.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 1eba937964..2332596b40 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -25,6 +25,7 @@ #include "hw/ide/pci.h" #include "hw/ide/ahci.h" #include "hw/sd/sdhci.h" +#include "hw/ssi/xilinx_spips.h" #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ @@ -35,6 +36,7 @@ #define XLNX_ZYNQMP_NUM_GEMS 4 #define XLNX_ZYNQMP_NUM_UARTS 2 #define XLNX_ZYNQMP_NUM_SDHCI 2 +#define XLNX_ZYNQMP_NUM_SPIS 2 #define XLNX_ZYNQMP_NUM_OCM_BANKS 4 #define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000 @@ -78,6 +80,7 @@ typedef struct XlnxZynqMPState { CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS]; SysbusAHCIState sata; SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI]; + XilinxSPIPS spi[XLNX_ZYNQMP_NUM_SPIS]; char *boot_cpu; ARMCPU *boot_cpu_ptr; |