summaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
authorStefan Weil <weil@mail.berlios.de>2010-04-06 13:44:07 +0200
committerMichael S. Tsirkin <mst@redhat.com>2010-04-07 10:58:00 +0300
commitae543b498ca75aee6cadd67cb308501f5f267418 (patch)
treea63945b762d67f2b8cf5a9fe3df1c245cc1e0f78 /hw
parent3dec59a1fb5e1144b655e00cca693240cab0bc70 (diff)
downloadqemu-ae543b498ca75aee6cadd67cb308501f5f267418.tar.gz
qemu-ae543b498ca75aee6cadd67cb308501f5f267418.tar.bz2
qemu-ae543b498ca75aee6cadd67cb308501f5f267418.zip
eepro100: Set power management capability using pci_reserve_capability
pci_add_capability automatically updates PCI status and PCI capability pointer, so use it. Use pci_reserve_capability to make the new capability appear at the correct offset. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/eepro100.c39
1 files changed, 18 insertions, 21 deletions
diff --git a/hw/eepro100.c b/hw/eepro100.c
index 32e670ec93..c7059296bb 100644
--- a/hw/eepro100.c
+++ b/hw/eepro100.c
@@ -456,7 +456,6 @@ static void eepro100_fcp_interrupt(EEPRO100State * s)
static void e100_pci_reset(EEPRO100State * s, E100PCIDeviceInfo *e100_device)
{
- /* TODO: Use pci_add_capability(&s->dev, PCI_CAP_ID_PM, ...) for PM. */
uint32_t device = s->device;
uint8_t *pci_conf = s->dev.config;
@@ -467,25 +466,14 @@ static void e100_pci_reset(EEPRO100State * s, E100PCIDeviceInfo *e100_device)
/* PCI Device ID */
pci_config_set_device_id(pci_conf, e100_device->device_id);
/* PCI Status */
- if (e100_device->power_management) {
- pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM |
- PCI_STATUS_FAST_BACK |
- PCI_STATUS_CAP_LIST);
- } else {
- pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM |
- PCI_STATUS_FAST_BACK);
- }
+ pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM |
+ PCI_STATUS_FAST_BACK);
/* PCI Revision ID */
pci_config_set_revision(pci_conf, e100_device->revision);
pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
/* PCI Latency Timer */
pci_set_byte(pci_conf + PCI_LATENCY_TIMER, 0x20); /* latency timer = 32 clocks */
- /* Capability Pointer */
- if (e100_device->power_management) {
- pci_set_byte(pci_conf + PCI_CAPABILITY_LIST, 0xdc);
- } else {
- pci_set_byte(pci_conf + PCI_CAPABILITY_LIST, 0x00);
- }
+ /* Capability Pointer is set by PCI framework. */
/* Minimum Grant */
pci_set_byte(pci_conf + PCI_MIN_GNT, 0x08);
/* Maximum Latency */
@@ -548,12 +536,21 @@ static void e100_pci_reset(EEPRO100State * s, E100PCIDeviceInfo *e100_device)
if (e100_device->power_management) {
/* Power Management Capabilities */
- pci_set_byte(pci_conf + 0xdc, PCI_CAP_ID_PM);
- /* Next Item Pointer */
- /* Capability ID */
- pci_set_word(pci_conf + 0xde, 0x7e21);
- /* TODO: Power Management Control / Status. */
- /* TODO: Ethernet Power Consumption Registers (i82559 and later). */
+ int cfg_offset;
+ pci_reserve_capability(&s->dev, PCI_CONFIG_HEADER_SIZE,
+ 0xdc - PCI_CONFIG_HEADER_SIZE);
+ cfg_offset = pci_add_capability(&s->dev, PCI_CAP_ID_PM, PCI_PM_SIZEOF);
+ assert(cfg_offset == 0xdc);
+ if (cfg_offset > 0) {
+ /* Power Management Capabilities */
+ pci_set_word(pci_conf + cfg_offset + PCI_PM_PMC, 0x7e21);
+#if 0 /* TODO: replace dummy code for power management emulation. */
+ /* TODO: Power Management Control / Status. */
+ pci_set_word(pci_conf + cfg_offset + PCI_PM_CTRL, 0x0000);
+ /* TODO: Ethernet Power Consumption Registers (i82559 and later). */
+ pci_set_byte(pci_conf + cfg_offset + PCI_PM_PPB_EXTENSIONS, 0x0000);
+#endif
+ }
}
#if EEPROM_SIZE > 0