diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-02-22 19:08:41 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-02-22 19:08:41 +0000 |
| commit | 713c45faf81f9a68ca589ce37d7e1dee6c2127a2 (patch) | |
| tree | a191b7377d0db71f33035a4e343a52cd320d01ce /hw | |
| parent | 0b9dc5e4c3b96a1e41ab7d660ba2ee2a83380e09 (diff) | |
| download | qemu-713c45faf81f9a68ca589ce37d7e1dee6c2127a2.tar.gz qemu-713c45faf81f9a68ca589ce37d7e1dee6c2127a2.tar.bz2 qemu-713c45faf81f9a68ca589ce37d7e1dee6c2127a2.zip | |
initrd support (Blue Swirl)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1306 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/sun4m.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/hw/sun4m.c b/hw/sun4m.c index 7cc5bd8d9c..7843799836 100644 --- a/hw/sun4m.c +++ b/hw/sun4m.c @@ -25,6 +25,7 @@ #include "m48t08.h" #define KERNEL_LOAD_ADDR 0x00004000 +#define INITRD_LOAD_ADDR 0x00800000 #define PROM_ADDR 0xffd00000 #define PROM_FILENAMEB "proll.bin" #define PROM_FILENAMEE "proll.elf" @@ -135,7 +136,8 @@ void sun4m_init(int ram_size, int vga_ram_size, int boot_device, { char buf[1024]; int ret, linux_boot; - unsigned long vram_size = 0x100000, prom_offset; + unsigned int i; + unsigned long vram_size = 0x100000, prom_offset, initrd_size; linux_boot = (kernel_filename != NULL); @@ -180,5 +182,26 @@ void sun4m_init(int ram_size, int vga_ram_size, int boot_device, kernel_filename); exit(1); } + + /* load initrd */ + initrd_size = 0; + if (initrd_filename) { + initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR); + if (initrd_size < 0) { + fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", + initrd_filename); + exit(1); + } + } + if (initrd_size > 0) { + for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { + if (ldl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i) + == 0x48647253) { // HdrS + stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR); + stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, initrd_size); + break; + } + } + } } } |