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authorJan Beulich <JBeulich@suse.com>2015-06-08 14:11:51 +0100
committerStefano Stabellini <stefano.stabellini@eu.citrix.com>2015-06-23 16:18:29 +0000
commit69976894c1d91c4b0c985fa05936cb6b8d01382b (patch)
treee53283fc6eac9b0746a819e3867228681d90a535 /hw/xen/xen_pt_config_init.c
parent950fe0aa3f55ad6bb135fc9cde9ebf4df05f62fc (diff)
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xen/pass-through: ROM BAR handling adjustments
Expecting the ROM BAR to be written with an all ones value when sizing the region is wrong - the low bit has another meaning (enable/disable) and bits 1..10 are reserved. The PCI spec also mandates writing all ones to just the address portion of the register. Use suitable constants also for initializing the ROM BAR register field description. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Diffstat (limited to 'hw/xen/xen_pt_config_init.c')
-rw-r--r--hw/xen/xen_pt_config_init.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
index f3cf069b60..f3730928d7 100644
--- a/hw/xen/xen_pt_config_init.c
+++ b/hw/xen/xen_pt_config_init.c
@@ -729,8 +729,8 @@ static XenPTRegInfo xen_pt_emu_reg_header0[] = {
.offset = PCI_ROM_ADDRESS,
.size = 4,
.init_val = 0x00000000,
- .ro_mask = 0x000007FE,
- .emu_mask = 0xFFFFF800,
+ .ro_mask = ~PCI_ROM_ADDRESS_MASK & ~PCI_ROM_ADDRESS_ENABLE,
+ .emu_mask = (uint32_t)PCI_ROM_ADDRESS_MASK,
.init = xen_pt_bar_reg_init,
.u.dw.read = xen_pt_long_reg_read,
.u.dw.write = xen_pt_exp_rom_bar_reg_write,