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authorAlexander Graf <agraf@suse.de>2012-10-08 12:21:30 +0200
committerAlexander Graf <agraf@suse.de>2012-10-29 11:45:56 +0100
commita1bc20dfbb012ea2a5fb1228cb77abd04490fd79 (patch)
tree9ef704599b65f54a1e7e9703b2dab16f08f470c0 /hw/spapr_pci.c
parent626c7a171e644fbe1579516b8b794d611c295d2f (diff)
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PPC: e500: Map PIO space into core memory region
On PPC, we don't have PIO. So usually PIO space behind a PCI bridge is accessible via MMIO. Do this mapping explicitly by mapping the PIO space of our PCI bus into a memory region that lives in memory space. Signed-off-by: Alexander Graf <agraf@suse.de>
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