diff options
author | malc <av1474@comtv.ru> | 2009-10-01 22:20:47 +0400 |
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committer | malc <av1474@comtv.ru> | 2009-10-01 22:45:02 +0400 |
commit | 99a0949b720a0936da2052cb9a46db04ffc6db29 (patch) | |
tree | f9e39633853e35b49fc4465337cc196b9650866e /hw/pxa2xx_pcmcia.c | |
parent | bc6291a1b95a2c4c546fde6e5cb4c68366f06649 (diff) | |
download | qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.tar.gz qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.tar.bz2 qemu-99a0949b720a0936da2052cb9a46db04ffc6db29.zip |
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time
being.
Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'hw/pxa2xx_pcmcia.c')
-rw-r--r-- | hw/pxa2xx_pcmcia.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/hw/pxa2xx_pcmcia.c b/hw/pxa2xx_pcmcia.c index be1309f62e..5c8a7059b8 100644 --- a/hw/pxa2xx_pcmcia.c +++ b/hw/pxa2xx_pcmcia.c @@ -20,7 +20,7 @@ struct PXA2xxPCMCIAState { }; static uint32_t pxa2xx_pcmcia_common_read(void *opaque, - target_phys_addr_t offset) + a_target_phys_addr offset) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -32,7 +32,7 @@ static uint32_t pxa2xx_pcmcia_common_read(void *opaque, } static void pxa2xx_pcmcia_common_write(void *opaque, - target_phys_addr_t offset, uint32_t value) + a_target_phys_addr offset, uint32_t value) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -42,7 +42,7 @@ static void pxa2xx_pcmcia_common_write(void *opaque, } static uint32_t pxa2xx_pcmcia_attr_read(void *opaque, - target_phys_addr_t offset) + a_target_phys_addr offset) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -54,7 +54,7 @@ static uint32_t pxa2xx_pcmcia_attr_read(void *opaque, } static void pxa2xx_pcmcia_attr_write(void *opaque, - target_phys_addr_t offset, uint32_t value) + a_target_phys_addr offset, uint32_t value) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -64,7 +64,7 @@ static void pxa2xx_pcmcia_attr_write(void *opaque, } static uint32_t pxa2xx_pcmcia_io_read(void *opaque, - target_phys_addr_t offset) + a_target_phys_addr offset) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -76,7 +76,7 @@ static uint32_t pxa2xx_pcmcia_io_read(void *opaque, } static void pxa2xx_pcmcia_io_write(void *opaque, - target_phys_addr_t offset, uint32_t value) + a_target_phys_addr offset, uint32_t value) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -130,7 +130,7 @@ static void pxa2xx_pcmcia_set_irq(void *opaque, int line, int level) qemu_set_irq(s->irq, level); } -PXA2xxPCMCIAState *pxa2xx_pcmcia_init(target_phys_addr_t base) +PXA2xxPCMCIAState *pxa2xx_pcmcia_init(a_target_phys_addr base) { int iomemtype; PXA2xxPCMCIAState *s; |