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author | Andrzej Zaborowski <balrog@zabor.org> | 2011-03-03 15:04:51 +0100 |
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committer | Andrzej Zaborowski <balrog@zabor.org> | 2011-03-03 15:04:51 +0100 |
commit | 2115c01924ff355c48c10ef08fe5a87c958eb54a (patch) | |
tree | 9db3874f84400bbc7e29680ee3cf5f92d9f82e09 /hw/pxa.h | |
parent | 47188700a45166b49f1579f3efeab72ae2045f7a (diff) | |
download | qemu-2115c01924ff355c48c10ef08fe5a87c958eb54a.tar.gz qemu-2115c01924ff355c48c10ef08fe5a87c958eb54a.tar.bz2 qemu-2115c01924ff355c48c10ef08fe5a87c958eb54a.zip |
pxa2xx_dma: port to qdev/vmstate
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
Diffstat (limited to 'hw/pxa.h')
-rw-r--r-- | hw/pxa.h | 16 |
1 files changed, 7 insertions, 9 deletions
@@ -71,12 +71,8 @@ DeviceState *pxa2xx_gpio_init(target_phys_addr_t base, void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler); /* pxa2xx_dma.c */ -typedef struct PXA2xxDMAState PXA2xxDMAState; -PXA2xxDMAState *pxa255_dma_init(target_phys_addr_t base, - qemu_irq irq); -PXA2xxDMAState *pxa27x_dma_init(target_phys_addr_t base, - qemu_irq irq); -void pxa2xx_dma_request(PXA2xxDMAState *s, int req_num, int on); +DeviceState *pxa255_dma_init(target_phys_addr_t base, qemu_irq irq); +DeviceState *pxa27x_dma_init(target_phys_addr_t base, qemu_irq irq); /* pxa2xx_lcd.c */ typedef struct PXA2xxLCDState PXA2xxLCDState; @@ -88,7 +84,8 @@ void pxa2xx_lcdc_oritentation(void *opaque, int angle); /* pxa2xx_mmci.c */ typedef struct PXA2xxMMCIState PXA2xxMMCIState; PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base, - BlockDriverState *bd, qemu_irq irq, void *dma); + BlockDriverState *bd, qemu_irq irq, + qemu_irq rx_dma, qemu_irq tx_dma); void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly, qemu_irq coverswitch); @@ -123,7 +120,7 @@ typedef struct { CPUState *env; DeviceState *pic; qemu_irq reset; - PXA2xxDMAState *dma; + DeviceState *dma; DeviceState *gpio; PXA2xxLCDState *lcd; SSIBus **ssp; @@ -181,7 +178,8 @@ typedef struct { struct PXA2xxI2SState { qemu_irq irq; - PXA2xxDMAState *dma; + qemu_irq rx_dma; + qemu_irq tx_dma; void (*data_req)(void *, int, int); uint32_t control[2]; |