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| author | Avi Kivity <avi@redhat.com> | 2012-10-23 12:30:10 +0200 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-10-23 08:58:25 -0500 |
| commit | a8170e5e97ad17ca169c64ba87ae2f53850dab4c (patch) | |
| tree | 51182ed444f0d2bf282f6bdacef43f32e5adaadf /hw/ppc405.h | |
| parent | 50d2b4d93f45a425f15ac88bc4ec352f5c6e0bc2 (diff) | |
| download | qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.tar.gz qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.tar.bz2 qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.zip | |
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific). Replace it with a finger-friendly,
standards conformant hwaddr.
Outstanding patchsets can be fixed up with the command
git rebase -i --exec 'find -name "*.[ch]"
| xargs s/target_phys_addr_t/hwaddr/g' origin
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/ppc405.h')
| -rw-r--r-- | hw/ppc405.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/ppc405.h b/hw/ppc405.h index 1f5dc5fd36..535cbfb339 100644 --- a/hw/ppc405.h +++ b/hw/ppc405.h @@ -61,20 +61,20 @@ ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd, CPUPPCState *ppc405cr_init(MemoryRegion *address_space_mem, MemoryRegion ram_memories[4], - target_phys_addr_t ram_bases[4], - target_phys_addr_t ram_sizes[4], + hwaddr ram_bases[4], + hwaddr ram_sizes[4], uint32_t sysclk, qemu_irq **picp, int do_init); CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, MemoryRegion ram_memories[2], - target_phys_addr_t ram_bases[2], - target_phys_addr_t ram_sizes[2], + hwaddr ram_bases[2], + hwaddr ram_sizes[2], uint32_t sysclk, qemu_irq **picp, int do_init); /* IBM STBxxx microcontrollers */ CPUPPCState *ppc_stb025_init (MemoryRegion ram_memories[2], - target_phys_addr_t ram_bases[2], - target_phys_addr_t ram_sizes[2], + hwaddr ram_bases[2], + hwaddr ram_sizes[2], uint32_t sysclk, qemu_irq **picp, ram_addr_t *offsetp); |