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authorAndreas Färber <afaerber@suse.de>2012-05-05 12:30:53 +0200
committerAndreas Färber <afaerber@suse.de>2012-06-04 23:00:42 +0200
commitbf494367fa77b5ed872d8add50677542a7141836 (patch)
treef5c220a348f60b08de950e4c9c82fd54fa9ab7cc /hw/petalogix_s3adsp1800_mmu.c
parent3ed607333e979a1637cc08af66858b7b37bd37ff (diff)
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microblaze_boot: Pass MicroBlazeCPU to microblaze_load_kernel()
Allows us to use cpu_reset() in place of cpu_state_reset() in main_cpu_reset(). Also pass it through to its reset callbacks, while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw/petalogix_s3adsp1800_mmu.c')
-rw-r--r--hw/petalogix_s3adsp1800_mmu.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c
index 7ff3cd5432..f41c559e61 100644
--- a/hw/petalogix_s3adsp1800_mmu.c
+++ b/hw/petalogix_s3adsp1800_mmu.c
@@ -49,8 +49,10 @@
#define UARTLITE_BASEADDR 0x84000000
#define ETHLITE_BASEADDR 0x81000000
-static void machine_cpu_reset(CPUMBState *env)
+static void machine_cpu_reset(MicroBlazeCPU *cpu)
{
+ CPUMBState *env = &cpu->env;
+
env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family. */
}
@@ -107,7 +109,7 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size,
xilinx_timer_create(TIMER_BASEADDR, irq[0], 2, 62 * 1000000);
xilinx_ethlite_create(&nd_table[0], ETHLITE_BASEADDR, irq[1], 0, 0);
- microblaze_load_kernel(env, ddr_base, ram_size,
+ microblaze_load_kernel(cpu, ddr_base, ram_size,
BINARY_DEVICE_TREE_FILE, machine_cpu_reset);
}