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| author | aliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-11 21:15:42 +0000 |
|---|---|---|
| committer | aliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-11 21:15:42 +0000 |
| commit | d350d97d196a632b6c7493acf07a061017fc6f7d (patch) | |
| tree | c13c6d95e8f0dd5c5ce6df9c147a25ca84e4b121 /hw/pci.h | |
| parent | 2d22b18f77ab0a488762e9216575b8582f1adb7d (diff) | |
| download | qemu-d350d97d196a632b6c7493acf07a061017fc6f7d.tar.gz qemu-d350d97d196a632b6c7493acf07a061017fc6f7d.tar.bz2 qemu-d350d97d196a632b6c7493acf07a061017fc6f7d.zip | |
pci: add default pci subsystem id for all devices (Gerd Hoffman)
This sets a default PCI subsystem ID for all emulated PCI devices. PCI
specs require this, so do it.
In many cases it is enougth to know the PCI ID to handle a device
correctly. Sometimes a device driver must identify the exact piece of
hardware (via PCI Subsystem ID) though.
What does this patch to qemu devices:
Right now the emulated PCI devices have no PCI subsystem ID, only the
PCI ID. The discussed patch sets a default PCI subsystem ID for all
emulated devices. Which will make the qemu devices look pretty much
like in the laptop case: all PCI subsystem IDs will point to qemu by
default.
If a driver emulates a very specific piece of hardware where it has to
emulate more than just the PCI chip, it can overwrite the PCI subsystem
ID without problems. The es1370 driver does that for example.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5986 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/pci.h')
| -rw-r--r-- | hw/pci.h | 12 |
1 files changed, 12 insertions, 0 deletions
@@ -8,6 +8,15 @@ extern target_phys_addr_t pci_mem_base; +/* see pci-ids.txt */ +#define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 +#define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 +#define PCI_SUBDEVICE_ID_QEMU 0x1100 + +#define PCI_DEVICE_ID_VIRTIO_NET 0x1000 +#define PCI_DEVICE_ID_VIRTIO_BLOCK 0x1001 +#define PCI_DEVICE_ID_VIRTIO_BALLOON 0x1002 + typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, uint32_t address, uint32_t data, int len); typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, @@ -36,7 +45,10 @@ typedef struct PCIIORegion { #define PCI_COMMAND 0x04 /* 16 bits */ #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ +#define PCI_REVISION 0x08 #define PCI_CLASS_DEVICE 0x0a /* Device class */ +#define PCI_SUBVENDOR_ID 0x2c /* 16 bits */ +#define PCI_SUBDEVICE_ID 0x2e /* 16 bits */ #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ #define PCI_MIN_GNT 0x3e /* 8 bits */ |