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author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-20 01:10:32 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-20 01:10:32 +0000 |
commit | 75554a3ca10a7ad295d2a3d2e14ee6ba90f94c8b (patch) | |
tree | 772244a72079f42be3bfaaac347e1b85386e7612 /hw/omap1.c | |
parent | b031ebc5c6be6e6e9453fb8bb499a821720e6880 (diff) | |
download | qemu-75554a3ca10a7ad295d2a3d2e14ee6ba90f94c8b.tar.gz qemu-75554a3ca10a7ad295d2a3d2e14ee6ba90f94c8b.tar.bz2 qemu-75554a3ca10a7ad295d2a3d2e14ee6ba90f94c8b.zip |
Allow attaching devices to OMAP UARTs.
Also avoid two signedness warnings in hw/omap2.c.
The API to attach new devices to serials is fine, bu the implementation
is a hack.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5263 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap1.c')
-rw-r--r-- | hw/omap1.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/hw/omap1.c b/hw/omap1.c index 101d36b30b..f74637d091 100644 --- a/hw/omap1.c +++ b/hw/omap1.c @@ -1983,6 +1983,8 @@ struct omap_uart_s { SerialState *serial; /* TODO */ struct omap_target_agent_s *ta; target_phys_addr_t base; + omap_clk fclk; + qemu_irq irq; uint8_t eblr; uint8_t syscontrol; @@ -2007,6 +2009,9 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base, struct omap_uart_s *s = (struct omap_uart_s *) qemu_mallocz(sizeof(struct omap_uart_s)); + s->base = base; + s->fclk = fclk; + s->irq = irq; s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16, chr ?: qemu_chr_open("null"), 1); @@ -2108,13 +2113,20 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta, omap_uart_writefn, s); s->ta = ta; - s->base = base; cpu_register_physical_memory(s->base + 0x20, 0x100, iomemtype); return s; } +void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr) +{ + /* TODO: Should reuse or destroy current s->serial */ + s->serial = serial_mm_init(s->base, 2, s->irq, + omap_clk_getrate(s->fclk) / 16, + chr ?: qemu_chr_open("null"), 1); +} + /* MPU Clock/Reset/Power Mode Control */ static uint32_t omap_clkm_read(void *opaque, target_phys_addr_t addr) { |