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author | Michael S. Tsirkin <mst@redhat.com> | 2011-11-21 18:57:31 +0200 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2011-11-21 15:05:59 -0600 |
commit | 9a93b61730e3b46ef1c01ca522c6abe80ec13832 (patch) | |
tree | 980eadcaf28fc5e87f359e032d5b1ce6076fad73 /hw/msix.c | |
parent | 50322249fdfa3fb8bc6a67c50aebb0f9c36bafb6 (diff) | |
download | qemu-9a93b61730e3b46ef1c01ca522c6abe80ec13832.tar.gz qemu-9a93b61730e3b46ef1c01ca522c6abe80ec13832.tar.bz2 qemu-9a93b61730e3b46ef1c01ca522c6abe80ec13832.zip |
msix: Prevent bogus mask updates on MMIO accesses
>From: Jan Kiszka <jan.kiszka@siemens.com>
Only accesses to the MSI-X table must trigger a call to
msix_handle_mask_update, otherwise the vector
value might be out of range.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/msix.c')
-rw-r--r-- | hw/msix.c | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -176,6 +176,12 @@ static void msix_mmio_write(void *opaque, target_phys_addr_t addr, PCIDevice *dev = opaque; unsigned int offset = addr & (MSIX_PAGE_SIZE - 1) & ~0x3; int vector = offset / PCI_MSIX_ENTRY_SIZE; + + /* MSI-X page includes a read-only PBA and a writeable Vector Control. */ + if (vector >= dev->msix_entries_nr) { + return; + } + pci_set_long(dev->msix_table_page + offset, val); msix_handle_mask_update(dev, vector); } |