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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-24 01:47:51 +0000 |
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| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-24 01:47:51 +0000 |
| commit | 4de9b249d37c1b382cc3e5a21fad1b4a11cec2fa (patch) | |
| tree | 3991d58b09108b5c18a4388b2c2a8b6cb8f57142 /hw/i8259.c | |
| parent | 30c4bbace19e802979009cc5c16fb4e14dc6bda6 (diff) | |
| download | qemu-4de9b249d37c1b382cc3e5a21fad1b4a11cec2fa.tar.gz qemu-4de9b249d37c1b382cc3e5a21fad1b4a11cec2fa.tar.bz2 qemu-4de9b249d37c1b382cc3e5a21fad1b4a11cec2fa.zip | |
Reworking MIPS interrupt handling, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/i8259.c')
| -rw-r--r-- | hw/i8259.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/i8259.c b/hw/i8259.c index c747f106e9..f8b5a984b5 100644 --- a/hw/i8259.c +++ b/hw/i8259.c @@ -161,6 +161,13 @@ void pic_update_irq(PicState2 *s) #endif s->irq_request(s->irq_request_opaque, 1); } + +/* all targets should do this rather than acking the IRQ in the cpu */ +#if defined(TARGET_MIPS) + else { + s->irq_request(s->irq_request_opaque, 0); + } +#endif } #ifdef DEBUG_IRQ_LATENCY |