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| author | Andreas Färber <afaerber@suse.de> | 2013-08-21 18:36:35 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-09-03 11:30:04 +0200 |
| commit | 27013bf20d5d93ac75d398aa3608604e8ad91b5a (patch) | |
| tree | c3abb5a04d82a26ba908a0ad034f8b744f855552 /hw/cpu/a15mpcore.c | |
| parent | 545825d4cda03ea292b7788b3401b99860efe8bc (diff) | |
| download | qemu-27013bf20d5d93ac75d398aa3608604e8ad91b5a.tar.gz qemu-27013bf20d5d93ac75d398aa3608604e8ad91b5a.tar.bz2 qemu-27013bf20d5d93ac75d398aa3608604e8ad91b5a.zip | |
a15mpcore: Use qemu_get_cpu() for generic timers
This simplifies the loop and aids with refactoring of CPU list.
Requested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/cpu/a15mpcore.c')
| -rw-r--r-- | hw/cpu/a15mpcore.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index af182da4ee..9abba67632 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -50,7 +50,6 @@ static int a15mp_priv_init(SysBusDevice *dev) SysBusDevice *busdev; const char *gictype = "arm_gic"; int i; - CPUState *cpu; if (kvm_irqchip_in_kernel()) { gictype = "kvm-arm-gic"; @@ -72,8 +71,8 @@ static int a15mp_priv_init(SysBusDevice *dev) /* Wire the outputs from each CPU's generic timer to the * appropriate GIC PPI inputs */ - for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu = cpu->next_cpu) { - DeviceState *cpudev = DEVICE(cpu); + for (i = 0; i < s->num_cpu; i++) { + DeviceState *cpudev = DEVICE(qemu_get_cpu(i)); int ppibase = s->num_irq - 32 + i * 32; /* physical timer; we wire it up to the non-secure timer's ID, * since a real A15 always has TrustZone but QEMU doesn't. |