diff options
author | Anthony Liguori <aliguori@us.ibm.com> | 2009-10-01 16:12:16 -0500 |
---|---|---|
committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-10-01 16:12:16 -0500 |
commit | c227f0995e1722a1abccc28cadf0664266bd8043 (patch) | |
tree | 39e92c2f818e3e8144978740b914731613af0e40 /hw/apb_pci.c | |
parent | 99a0949b720a0936da2052cb9a46db04ffc6db29 (diff) | |
download | qemu-c227f0995e1722a1abccc28cadf0664266bd8043.tar.gz qemu-c227f0995e1722a1abccc28cadf0664266bd8043.tar.bz2 qemu-c227f0995e1722a1abccc28cadf0664266bd8043.zip |
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/apb_pci.c')
-rw-r--r-- | hw/apb_pci.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/hw/apb_pci.c b/hw/apb_pci.c index 6bb0324728..eb77042503 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -39,7 +39,7 @@ do { printf("APB: " fmt , ## __VA_ARGS__); } while (0) #define APB_DPRINTF(fmt, ...) #endif -typedef a_target_phys_addr a_pci_addr; +typedef target_phys_addr_t pci_addr_t; #include "pci_host.h" typedef struct APBState { @@ -47,7 +47,7 @@ typedef struct APBState { PCIHostState host_state; } APBState; -static void pci_apb_config_writel (void *opaque, a_target_phys_addr addr, +static void pci_apb_config_writel (void *opaque, target_phys_addr_t addr, uint32_t val) { APBState *s = opaque; @@ -61,7 +61,7 @@ static void pci_apb_config_writel (void *opaque, a_target_phys_addr addr, } static uint32_t pci_apb_config_readl (void *opaque, - a_target_phys_addr addr) + target_phys_addr_t addr) { APBState *s = opaque; uint32_t val; @@ -87,7 +87,7 @@ static CPUReadMemoryFunc * const pci_apb_config_read[] = { &pci_apb_config_readl, }; -static void apb_config_writel (void *opaque, a_target_phys_addr addr, +static void apb_config_writel (void *opaque, target_phys_addr_t addr, uint32_t val) { //PCIBus *s = opaque; @@ -105,7 +105,7 @@ static void apb_config_writel (void *opaque, a_target_phys_addr addr, } static uint32_t apb_config_readl (void *opaque, - a_target_phys_addr addr) + target_phys_addr_t addr) { //PCIBus *s = opaque; uint32_t val; @@ -148,25 +148,25 @@ static CPUReadMemoryFunc * const pci_apb_read[] = { &pci_host_data_readl, }; -static void pci_apb_iowriteb (void *opaque, a_target_phys_addr addr, +static void pci_apb_iowriteb (void *opaque, target_phys_addr_t addr, uint32_t val) { cpu_outb(addr & IOPORTS_MASK, val); } -static void pci_apb_iowritew (void *opaque, a_target_phys_addr addr, +static void pci_apb_iowritew (void *opaque, target_phys_addr_t addr, uint32_t val) { cpu_outw(addr & IOPORTS_MASK, val); } -static void pci_apb_iowritel (void *opaque, a_target_phys_addr addr, +static void pci_apb_iowritel (void *opaque, target_phys_addr_t addr, uint32_t val) { cpu_outl(addr & IOPORTS_MASK, val); } -static uint32_t pci_apb_ioreadb (void *opaque, a_target_phys_addr addr) +static uint32_t pci_apb_ioreadb (void *opaque, target_phys_addr_t addr) { uint32_t val; @@ -174,7 +174,7 @@ static uint32_t pci_apb_ioreadb (void *opaque, a_target_phys_addr addr) return val; } -static uint32_t pci_apb_ioreadw (void *opaque, a_target_phys_addr addr) +static uint32_t pci_apb_ioreadw (void *opaque, target_phys_addr_t addr) { uint32_t val; @@ -182,7 +182,7 @@ static uint32_t pci_apb_ioreadw (void *opaque, a_target_phys_addr addr) return val; } -static uint32_t pci_apb_ioreadl (void *opaque, a_target_phys_addr addr) +static uint32_t pci_apb_ioreadl (void *opaque, target_phys_addr_t addr) { uint32_t val; @@ -226,8 +226,8 @@ static void pci_apb_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(pic[irq_num], level); } -PCIBus *pci_apb_init(a_target_phys_addr special_base, - a_target_phys_addr mem_base, +PCIBus *pci_apb_init(target_phys_addr_t special_base, + target_phys_addr_t mem_base, qemu_irq *pic, PCIBus **bus2, PCIBus **bus3) { DeviceState *dev; |