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author | Michael S. Tsirkin <mst@redhat.com> | 2013-03-31 15:31:14 +0300 |
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committer | Michael S. Tsirkin <mst@redhat.com> | 2013-04-16 01:41:53 +0300 |
commit | 22773d6066a7f01a95f78c270edf9dbd2e755ac3 (patch) | |
tree | 5507eb1b8271147b211e178f4d726f6f35b44616 /docs | |
parent | 41cb62c2d9a5a2668165fdd6f195f54ad30e5396 (diff) | |
download | qemu-22773d6066a7f01a95f78c270edf9dbd2e755ac3.tar.gz qemu-22773d6066a7f01a95f78c270edf9dbd2e755ac3.tar.bz2 qemu-22773d6066a7f01a95f78c270edf9dbd2e755ac3.zip |
pci: add pci test device
This device is used for kvm unit tests,
currently it supports testing performance of ioeventfd.
Using updated kvm unittest, here's an example output:
mmio-no-eventfd:pci-mem 8796
mmio-wildcard-eventfd:pci-mem 3609
mmio-datamatch-eventfd:pci-mem 3685
portio-no-eventfd:pci-io 5287
portio-wildcard-eventfd:pci-io 1762
portio-datamatch-eventfd:pci-io 1777
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'docs')
-rw-r--r-- | docs/specs/pci-testdev.txt | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/docs/specs/pci-testdev.txt b/docs/specs/pci-testdev.txt new file mode 100644 index 0000000000..128ae222ef --- /dev/null +++ b/docs/specs/pci-testdev.txt @@ -0,0 +1,26 @@ +pci-test is a device used for testing low level IO + +device implements up to two BARs: BAR0 and BAR1. +Each BAR can be memory or IO. Guests must detect +BAR type and act accordingly. + +Each BAR size is up to 4K bytes. +Each BAR starts with the following header: + +typedef struct PCITestDevHdr { + uint8_t test; <- write-only, starts a given test number + uint8_t width_type; <- read-only, type and width of access for a given test. + 1,2,4 for byte,word or long write. + any other value if test not supported on this BAR + uint8_t pad0[2]; + uint32_t offset; <- read-only, offset in this BAR for a given test + uint32_t data; <- read-only, data to use for a given test + uint32_t count; <- for debugging. number of writes detected. + uint8_t name[]; <- for debugging. 0-terminated ASCII string. +} PCITestDevHdr; + +All registers are little endian. + +device is expected to always implement tests 0 to N on each BAR, and to add new +tests with higher numbers. In this way a guest can scan test numbers until it +detects an access type that it does not support on this BAR, then stop. |