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author | Paul Brook <paul@codesourcery.com> | 2010-03-12 16:54:58 +0000 |
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committer | Paul Brook <paul@codesourcery.com> | 2010-03-12 18:34:21 +0000 |
commit | 20cb400d41b07f33ed34d5ed917e534c7f12738b (patch) | |
tree | 48cd594d36f4d3a91f8aaced83a4ed99ca1c67df /cpu-defs.h | |
parent | 41c1b1c9ebb45b97795fa9e58eaa6fedc4eafe0e (diff) | |
download | qemu-20cb400d41b07f33ed34d5ed917e534c7f12738b.tar.gz qemu-20cb400d41b07f33ed34d5ed917e534c7f12738b.tar.bz2 qemu-20cb400d41b07f33ed34d5ed917e534c7f12738b.zip |
Remove TLB from userspace
Remove TLB from userspace CPU structure.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Diffstat (limited to 'cpu-defs.h')
-rw-r--r-- | cpu-defs.h | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/cpu-defs.h b/cpu-defs.h index 7fdbe97787..47c1d85968 100644 --- a/cpu-defs.h +++ b/cpu-defs.h @@ -72,6 +72,7 @@ typedef uint64_t target_ulong; #define TB_JMP_ADDR_MASK (TB_JMP_PAGE_SIZE - 1) #define TB_JMP_PAGE_MASK (TB_JMP_CACHE_SIZE - TB_JMP_PAGE_SIZE) +#if !defined(CONFIG_USER_ONLY) #define CPU_TLB_BITS 8 #define CPU_TLB_SIZE (1 << CPU_TLB_BITS) @@ -106,6 +107,18 @@ typedef struct CPUTLBEntry { sizeof(target_phys_addr_t))]; } CPUTLBEntry; +#define CPU_COMMON_TLB \ + /* The meaning of the MMU modes is defined in the target code. */ \ + CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \ + target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \ + +#else + +#define CPU_COMMON_TLB + +#endif + + #ifdef HOST_WORDS_BIGENDIAN typedef struct icount_decr_u16 { uint16_t high; @@ -150,9 +163,7 @@ typedef struct CPUWatchpoint { uint32_t stopped; /* Artificially stopped */ \ uint32_t interrupt_request; \ volatile sig_atomic_t exit_request; \ - /* The meaning of the MMU modes is defined in the target code. */ \ - CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \ - target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \ + CPU_COMMON_TLB \ struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \ /* buffer for temporaries in the code generator */ \ long temp_buf[CPU_TEMP_BUF_NLONGS]; \ |