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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-06-25 21:54:59 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2006-06-25 21:54:59 +0000
commit2a4188a38fa3a91a9286da6fe077b6218378504d (patch)
tree487279a8765bd844f1fe5c83672e5c3807da0cbd /cpu-all.h
parent4f4fbf77ade902f929959b0e10fbf7e56bb85816 (diff)
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low level support for memory mapped flash devices (initial patch by Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2020 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-all.h')
-rw-r--r--cpu-all.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/cpu-all.h b/cpu-all.h
index ac65043d5a..6d6eb1a4cc 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -828,6 +828,10 @@ extern uint8_t *phys_ram_dirty;
#define IO_MEM_ROM (1 << IO_MEM_SHIFT) /* hardcoded offset */
#define IO_MEM_UNASSIGNED (2 << IO_MEM_SHIFT)
#define IO_MEM_NOTDIRTY (4 << IO_MEM_SHIFT) /* used internally, never use directly */
+/* acts like a ROM when read and like a device when written. As an
+ exception, the write memory callback gets the ram offset instead of
+ the physical address */
+#define IO_MEM_ROMD (1)
typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);