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authorMax Filippov <jcmvbkbc@gmail.com>2011-09-06 03:55:47 +0400
committerBlue Swirl <blauwirbel@gmail.com>2011-09-10 16:57:39 +0000
commit1ddeaa5d4277af76679d02bc59b08657c357aee6 (patch)
treec0641b7c4feaf2633c5bd99cd61138f11d54f19d /Makefile.target
parent5b4e481b041150fbc6eaef6205095077893a3781 (diff)
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target-xtensa: implement SIMCALL
Tensilica iss provides support for applications running in freestanding environment through SIMCALL command. It is used by Tensilica libc to access argc/argv, for file I/O, etc. Note that simcalls that accept buffer addresses expect virtual addresses. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'Makefile.target')
-rw-r--r--Makefile.target1
1 files changed, 1 insertions, 0 deletions
diff --git a/Makefile.target b/Makefile.target
index 7833dcc10a..ca8eaf2ffa 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -370,6 +370,7 @@ obj-alpha-y += vga.o cirrus_vga.o
obj-xtensa-y += xtensa_pic.o
obj-xtensa-y += xtensa_sample.o
+obj-xtensa-y += xtensa-semi.o
main.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)