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author | Jan Kiszka <jan.kiszka@siemens.com> | 2011-10-07 09:19:40 +0200 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2011-10-16 11:10:55 +0000 |
commit | 620260174abdbfaba6dbe17098c91a7d164249d3 (patch) | |
tree | b2fc566a2323eb9552859e30a637ce77dd689f24 | |
parent | ef5e1ae2c120419f60d1a552998b1a8384cc2287 (diff) | |
download | qemu-620260174abdbfaba6dbe17098c91a7d164249d3.tar.gz qemu-620260174abdbfaba6dbe17098c91a7d164249d3.tar.bz2 qemu-620260174abdbfaba6dbe17098c91a7d164249d3.zip |
i8259: Move pic_set_irq1 after pic_update_irq
We are about to call the latter from the former. No functional changes.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
-rw-r--r-- | hw/i8259.c | 55 |
1 files changed, 29 insertions, 26 deletions
diff --git a/hw/i8259.c b/hw/i8259.c index f1d58bacb4..de2d5ca055 100644 --- a/hw/i8259.c +++ b/hw/i8259.c @@ -79,32 +79,6 @@ static uint64_t irq_count[16]; #endif PicState2 *isa_pic; -/* set irq level. If an edge is detected, then the IRR is set to 1 */ -static void pic_set_irq1(PicState *s, int irq, int level) -{ - int mask; - mask = 1 << irq; - if (s->elcr & mask) { - /* level triggered */ - if (level) { - s->irr |= mask; - s->last_irr |= mask; - } else { - s->irr &= ~mask; - s->last_irr &= ~mask; - } - } else { - /* edge triggered */ - if (level) { - if ((s->last_irr & mask) == 0) - s->irr |= mask; - s->last_irr |= mask; - } else { - s->last_irr &= ~mask; - } - } -} - /* return the highest priority found in mask (highest = smallest number). Return 8 if no irq */ static int get_priority(PicState *s, int mask) @@ -144,6 +118,8 @@ static int pic_get_irq(PicState *s) } } +static void pic_set_irq1(PicState *s, int irq, int level); + /* raise irq to CPU if necessary. must be called every time the active irq may change */ static void pic_update_irq(PicState2 *s) @@ -178,6 +154,33 @@ static void pic_update_irq(PicState2 *s) } } +/* set irq level. If an edge is detected, then the IRR is set to 1 */ +static void pic_set_irq1(PicState *s, int irq, int level) +{ + int mask; + mask = 1 << irq; + if (s->elcr & mask) { + /* level triggered */ + if (level) { + s->irr |= mask; + s->last_irr |= mask; + } else { + s->irr &= ~mask; + s->last_irr &= ~mask; + } + } else { + /* edge triggered */ + if (level) { + if ((s->last_irr & mask) == 0) { + s->irr |= mask; + } + s->last_irr |= mask; + } else { + s->last_irr &= ~mask; + } + } +} + #ifdef DEBUG_IRQ_LATENCY int64_t irq_time[16]; #endif |