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| author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2011-04-11 23:55:42 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2011-04-11 23:55:42 +0200 |
| commit | 3b584046aae87df3ac195cc85b89ff86c1a8db01 (patch) | |
| tree | 669bed6a04d3e8fbd77b0b667a33754c0c334f1a | |
| parent | 7458a432f03bc9af031336af29fc6477de8c5e34 (diff) | |
| download | qemu-3b584046aae87df3ac195cc85b89ff86c1a8db01.tar.gz qemu-3b584046aae87df3ac195cc85b89ff86c1a8db01.tar.bz2 qemu-3b584046aae87df3ac195cc85b89ff86c1a8db01.zip | |
microblaze: Add constant for exception-code mask
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
| -rw-r--r-- | target-microblaze/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index cc096474ff..d0aee190ba 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -91,6 +91,7 @@ struct CPUMBState; #define ESR_EC_INSN_STORAGE 9 #define ESR_EC_DATA_TLB 10 #define ESR_EC_INSN_TLB 11 +#define ESR_EC_MASK 31 /* Floating Point Status Register (FSR) Bits */ #define FSR_IO (1<<4) /* Invalid operation */ |