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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-10-05 15:04:45 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-10-05 15:04:45 +0100 |
| commit | 1273d9ca09e91bb290d10f704055f6abec363dd6 (patch) | |
| tree | d127e002ac31e0ea5bd4a988bc8b506a67468553 | |
| parent | d593c48ef91b6fee609d9c87958fe76dd2b36852 (diff) | |
| download | qemu-1273d9ca09e91bb290d10f704055f6abec363dd6.tar.gz qemu-1273d9ca09e91bb290d10f704055f6abec363dd6.tar.bz2 qemu-1273d9ca09e91bb290d10f704055f6abec363dd6.zip | |
target-arm: Drop unused DECODE_CPREG_CRN macro
This macro snuck through code review despite being unused; drop it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target-arm/cpu.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 7fac94f817..ff4de10f12 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -423,8 +423,6 @@ void armv7m_nvic_complete_irq(void *opaque, int irq); (((cp) << 16) | ((is64) << 15) | ((crn) << 11) | \ ((crm) << 7) | ((opc1) << 3) | (opc2)) -#define DECODE_CPREG_CRN(enc) (((enc) >> 7) & 0xf) - /* ARMCPRegInfo type field bits. If the SPECIAL bit is set this is a * special-behaviour cp reg and bits [15..8] indicate what behaviour * it has. Otherwise it is a simple cp reg, where CONST indicates that |