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| author | Zhao Halley <halley.zhao@intel.com> | 2012-08-02 12:04:37 +0300 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2012-08-31 04:09:01 -0400 |
| commit | 782452edee90b0cbf3c7fed4e2bbe6ff400fc3b2 (patch) | |
| tree | 7f10ee04c6fc00f65f1495be6645b3cfb5ed8f50 /src/i965_post_processing.h | |
| parent | 7d0a097211762db1cf569095ae65709ee9918716 (diff) | |
| download | vaapi-intel-driver-782452edee90b0cbf3c7fed4e2bbe6ff400fc3b2.tar.gz vaapi-intel-driver-782452edee90b0cbf3c7fed4e2bbe6ff400fc3b2.tar.bz2 vaapi-intel-driver-782452edee90b0cbf3c7fed4e2bbe6ff400fc3b2.zip | |
work around hw limitation(dword alignment) of horizontal offset
on dst surface left edge (nv12 avs)
Diffstat (limited to 'src/i965_post_processing.h')
| -rwxr-xr-x | src/i965_post_processing.h | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h index 1afffc5..ecfbae1 100755 --- a/src/i965_post_processing.h +++ b/src/i965_post_processing.h @@ -313,13 +313,17 @@ struct pp_inline_parameter /* AVS r6.0 */ float video_step_delta; - /* r6.1 */ - unsigned int block_horizontal_mask:16; - unsigned int block_vertical_mask:8; - unsigned int pad:8; + /* r6.1 */ // sizeof(int) == 4? + unsigned int block_horizontal_mask_right:16; + unsigned int block_vertical_mask_bottom:8; + unsigned int pad1:8; - /* r6.2-r6.7 */ - unsigned int padx[6]; + /* r6.2 */ + unsigned int block_horizontal_mask_middle:16; + unsigned int pad2:16; + + /* r6.3-r6.7 */ + unsigned int padx[5]; } grf6; }; @@ -476,8 +480,9 @@ struct i965_post_processing_context struct intel_batchbuffer *batch; - unsigned int block_horizontal_mask:16; - unsigned int block_vertical_mask:8; + unsigned int block_horizontal_mask_left:16; + unsigned int block_horizontal_mask_right:16; + unsigned int block_vertical_mask_bottom:8; }; struct i965_proc_context |