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author | Xiang, Haihao <haihao.xiang@intel.com> | 2012-06-26 15:20:50 +0800 |
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committer | Xiang, Haihao <haihao.xiang@intel.com> | 2012-06-26 15:22:58 +0800 |
commit | 91f58c47d5870ca3238d2be875e5ed6aceaaeb5a (patch) | |
tree | 8d34735cbb573cb18ef388cedfffb4ccaafe30fc /src/i965_post_processing.c | |
parent | 2075cc885eb987df73bcf2a7b44b7b9d1154398e (diff) | |
download | vaapi-intel-driver-91f58c47d5870ca3238d2be875e5ed6aceaaeb5a.tar.gz vaapi-intel-driver-91f58c47d5870ca3238d2be875e5ed6aceaaeb5a.tar.bz2 vaapi-intel-driver-91f58c47d5870ca3238d2be875e5ed6aceaaeb5a.zip |
only update u/v offset for some video processes
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Diffstat (limited to 'src/i965_post_processing.c')
-rwxr-xr-x | src/i965_post_processing.c | 90 |
1 files changed, 43 insertions, 47 deletions
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c index ad5e24c..4bb2a74 100755 --- a/src/i965_post_processing.c +++ b/src/i965_post_processing.c @@ -1054,6 +1054,45 @@ ironlake_pp_pipeline_setup(VADriverContextP ctx, intel_batchbuffer_end_atomic(batch); } +// update u/v offset when the surface format are packed yuv +static void i965_update_src_surface_uv_offset( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *surface) +{ + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + int fourcc = pp_get_surface_fourcc(ctx, surface); + + if (fourcc == VA_FOURCC('Y', 'U', 'Y', '2')) { + pp_static_parameter->grf1.source_packed_u_offset = 1; + pp_static_parameter->grf1.source_packed_v_offset = 3; + } + else if (fourcc == VA_FOURCC('U', 'Y', 'V', 'Y')) { + pp_static_parameter->grf1.source_packed_y_offset = 1; + pp_static_parameter->grf1.source_packed_v_offset = 2; + } + +} + +static void i965_update_dst_surface_uv_offset( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *surface) +{ + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + int fourcc = pp_get_surface_fourcc(ctx, surface); + + if (fourcc == VA_FOURCC('Y', 'U', 'Y', '2')) { + pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_u_offset = 1; + pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_v_offset = 3; + } + else if (fourcc == VA_FOURCC('U', 'Y', 'V', 'Y')) { + pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_y_offset = 1; + pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_v_offset = 2; + } + +} + static void i965_pp_set_surface_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context, dri_bo *surf_bo, unsigned long surf_bo_offset, @@ -1520,6 +1559,10 @@ pp_plx_load_save_plx_initialize(VADriverContextP ctx, struct i965_post_processin pp_static_parameter->grf3.horizontal_origin_offset = src_rect->x; pp_static_parameter->grf3.vertical_origin_offset = src_rect->y; + // update u/v offset for packed yuv + i965_update_src_surface_uv_offset (ctx, pp_context, src_surface); + i965_update_dst_surface_uv_offset (ctx, pp_context, dst_surface); + dst_surface->flags = src_surface->flags; return VA_STATUS_SUCCESS; @@ -3145,45 +3188,6 @@ gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_con return VA_STATUS_SUCCESS; } -// update u/v offset when the surface format are packed yuv -static void i965_update_src_surface_uv_offset( - VADriverContextP ctx, - struct i965_post_processing_context *pp_context, - const struct i965_surface *surface) -{ - struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; - int fourcc = pp_get_surface_fourcc(ctx, surface); - - if (fourcc == VA_FOURCC('Y', 'U', 'Y', '2')) { - pp_static_parameter->grf1.source_packed_u_offset = 1; - pp_static_parameter->grf1.source_packed_v_offset = 3; - } - else if (fourcc == VA_FOURCC('U', 'Y', 'V', 'Y')) { - pp_static_parameter->grf1.source_packed_y_offset = 1; - pp_static_parameter->grf1.source_packed_v_offset = 2; - } - -} - -static void i965_update_dst_surface_uv_offset( - VADriverContextP ctx, - struct i965_post_processing_context *pp_context, - const struct i965_surface *surface) -{ - struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; - int fourcc = pp_get_surface_fourcc(ctx, surface); - - if (fourcc == VA_FOURCC('Y', 'U', 'Y', '2')) { - pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_u_offset = 1; - pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_v_offset = 3; - } - else if (fourcc == VA_FOURCC('U', 'Y', 'V', 'Y')) { - pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_y_offset = 1; - pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_v_offset = 2; - } - -} - static VAStatus ironlake_pp_initialize( VADriverContextP ctx, @@ -3268,10 +3272,6 @@ ironlake_pp_initialize( memset(pp_context->pp_static_parameter, 0, static_param_size); memset(pp_context->pp_inline_parameter, 0, inline_param_size); - // update u/v offset for packed yuv - i965_update_src_surface_uv_offset (ctx, pp_context, src_surface); - i965_update_dst_surface_uv_offset (ctx, pp_context, dst_surface); - assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); pp_context->current_pp = pp_index; pp_module = &pp_context->pp_modules[pp_index]; @@ -3408,10 +3408,6 @@ gen6_pp_initialize( memset(pp_context->pp_static_parameter, 0, static_param_size); memset(pp_context->pp_inline_parameter, 0, inline_param_size); - // update u/v offset for packed yuv - i965_update_src_surface_uv_offset (ctx, pp_context, src_surface); - i965_update_dst_surface_uv_offset (ctx, pp_context, dst_surface); - assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); pp_context->current_pp = pp_index; pp_module = &pp_context->pp_modules[pp_index]; |