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authorLi Xiaowei <xiaowei.a.li@intel.com>2013-01-15 15:26:14 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2013-01-17 13:08:41 +0800
commitd2a07076acdc5b8908797f7f79568f58b4411ce6 (patch)
tree705cf7fb54342e803c8c15a10a3a082b5a05b883
parent54845cc2557f224ebb0fd66ce3629daf63aad021 (diff)
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apply new mv offset for mpeg2 encoding on HSW
Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>
-rw-r--r--src/gen75_mfc.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c
index dd8bf71..6262043 100644
--- a/src/gen75_mfc.c
+++ b/src/gen75_mfc.c
@@ -2007,7 +2007,7 @@ gen75_mfc_mpeg2_pak_object_intra(VADriverContextP ctx,
return len_in_dwords;
}
-#define MV_OFFSET_IN_WORD 112
+#define MPEG2_INTER_MV_OFFSET 12
static struct _mv_ranges
{
@@ -2068,10 +2068,10 @@ gen75_mfc_mpeg2_pak_object_inter(VADriverContextP ctx,
batch = encoder_context->base.batch;
mvptr = (short *)msg;
- mvx0 = mpeg2_motion_vector(mvptr[MV_OFFSET_IN_WORD + 0] / 2, x, width_in_mbs * 16, pic_param->f_code[0][0]);
- mvy0 = mpeg2_motion_vector(mvptr[MV_OFFSET_IN_WORD + 1] / 2, y, height_in_mbs * 16, pic_param->f_code[0][0]);
- mvx1 = mpeg2_motion_vector(mvptr[MV_OFFSET_IN_WORD + 2] / 2, x, width_in_mbs * 16, pic_param->f_code[1][0]);
- mvy1 = mpeg2_motion_vector(mvptr[MV_OFFSET_IN_WORD + 3] / 2, y, height_in_mbs * 16, pic_param->f_code[1][0]);
+ mvx0 = mpeg2_motion_vector(mvptr[MPEG2_INTER_MV_OFFSET + 0] / 2, x, width_in_mbs * 16, pic_param->f_code[0][0]);
+ mvy0 = mpeg2_motion_vector(mvptr[MPEG2_INTER_MV_OFFSET + 1] / 2, y, height_in_mbs * 16, pic_param->f_code[0][0]);
+ mvx1 = mpeg2_motion_vector(mvptr[MPEG2_INTER_MV_OFFSET + 2] / 2, x, width_in_mbs * 16, pic_param->f_code[1][0]);
+ mvy1 = mpeg2_motion_vector(mvptr[MPEG2_INTER_MV_OFFSET + 3] / 2, y, height_in_mbs * 16, pic_param->f_code[1][0]);
BEGIN_BCS_BATCH(batch, len_in_dwords);
@@ -2114,12 +2114,6 @@ gen75_mfc_mpeg2_pak_object_inter(VADriverContextP ctx,
return len_in_dwords;
}
-#define INTRA_RDO_OFFSET 4
-#define INTER_RDO_OFFSET 54
-#define INTER_MSG_OFFSET 52
-#define INTER_MV_OFFSET 224
-#define RDO_MASK 0xFFFF
-
static void
intel_mfc_mpeg2_pipeline_header_programing(VADriverContextP ctx,
struct encode_state *encode_state,