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| author | Xiang, Haihao <haihao.xiang@intel.com> | 2012-06-07 09:02:30 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2012-06-07 09:02:30 +0800 |
| commit | bc0874740a66af0ef47cd25cfa5f92e517f0894d (patch) | |
| tree | 337b680e882a98401cf6b727698fcfc7d5c30582 | |
| parent | 31721a6f00d8011bafcf6c052697d75d3e5929c8 (diff) | |
| download | vaapi-intel-driver-bc0874740a66af0ef47cd25cfa5f92e517f0894d.tar.gz vaapi-intel-driver-bc0874740a66af0ef47cd25cfa5f92e517f0894d.tar.bz2 vaapi-intel-driver-bc0874740a66af0ef47cd25cfa5f92e517f0894d.zip | |
Fix QP setting for CBR mode
The QP specified in MFX_AVC_SLICE_STATE is also used as the starting
QP in the first MB of a slice. In addition, add assertions for QP releated
setting for 8-bit pixel bit-depth support
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Rogozhkin, Dmitry V <dmitry.v.rogozhkin@intel.com>
| -rw-r--r-- | src/gen6_mfc.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c index a730181..f33241a 100644 --- a/src/gen6_mfc.c +++ b/src/gen6_mfc.c @@ -1159,6 +1159,17 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx, int slice_header_length_in_bits = 0; unsigned int tail_data[] = { 0x0, 0x0 }; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[1 - is_intra].QpPrimeY; + pSliceParameter->slice_qp_delta = qp - 26; + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + gen6_mfc_avc_slice_state(ctx, pPicParameter, pSliceParameter, @@ -1528,6 +1539,17 @@ gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx, int old_used = intel_batchbuffer_used_size(slice_batch), used; unsigned short head_size, tail_size; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[1 - is_intra].QpPrimeY; + pSliceParameter->slice_qp_delta = qp - 26; + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + head_offset = old_used / 16; gen6_mfc_avc_slice_state(ctx, pPicParameter, |