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-rw-r--r--packaging/dmidecode-2.11-smbios-271.patch119
1 files changed, 119 insertions, 0 deletions
diff --git a/packaging/dmidecode-2.11-smbios-271.patch b/packaging/dmidecode-2.11-smbios-271.patch
new file mode 100644
index 0000000..a8d26f4
--- /dev/null
+++ b/packaging/dmidecode-2.11-smbios-271.patch
@@ -0,0 +1,119 @@
+commit 799a9d8b31f10d7d3d4db1365df409221a5ff413
+Author: Anton Arapov <aarapov@redhat.com>
+Date: Tue May 3 14:43:42 2011 +0200
+
+ update to smbios 2.7.1
+---
+ CHANGELOG | 9 +++++++++
+ dmidecode.c | 38 +++++++++++++++++++++++++++++++-------
+ 2 files changed, 40 insertions(+), 7 deletions(-)
+
+diff --git a/CHANGELOG b/CHANGELOG
+index de3d7e8..c10f5f4 100644
+--- a/CHANGELOG
++++ b/CHANGELOG
+@@ -1,3 +1,12 @@
++2011-04-20 Jean Delvare <khali@linux-fr.org>
++
++ Update to support SMBIOS specification version 2.7.1.
++
++ * dmidecode.c: Add 6 AMD processor families (DMI type 4).
++ * dmidecode.c: Add cache associativity value
++ "20-way Set-associative" (DMI type 7).
++ * dmidecode.c: Add PCI Express 3 slot types (DMI type 9).
++
+ 2011-01-25 Jean Delvare <khali@linux-fr.org>
+
+ * dmidecode.c: Fix boundary checks of memory array location codes
+diff --git a/dmidecode.c b/dmidecode.c
+index 7b081f9..f7b23c1 100644
+--- a/dmidecode.c
++++ b/dmidecode.c
+@@ -707,6 +707,8 @@ static const char *dmi_processor_family(const struct dmi_header *h, u16 ver)
+ { 0x3A, "Athlon II Dual-Core M" },
+ { 0x3B, "Opteron 6100" },
+ { 0x3C, "Opteron 4100" },
++ { 0x3D, "Opteron 6200" },
++ { 0x3E, "Opteron 4200" },
+
+ { 0x40, "MIPS" },
+ { 0x41, "MIPS R4000" },
+@@ -714,6 +716,10 @@ static const char *dmi_processor_family(const struct dmi_header *h, u16 ver)
+ { 0x43, "MIPS R4400" },
+ { 0x44, "MIPS R4600" },
+ { 0x45, "MIPS R10000" },
++ { 0x46, "C-Series" },
++ { 0x47, "E-Series" },
++ { 0x48, "S-Series" },
++ { 0x49, "G-Series" },
+
+ { 0x50, "SPARC" },
+ { 0x51, "SuperSPARC" },
+@@ -997,7 +1003,8 @@ static void dmi_processor_id(u8 type, const u8 *p, const char *version, const ch
+ sig = 1;
+ else if ((type >= 0x18 && type <= 0x1D) /* AMD */
+ || type == 0x1F /* AMD */
+- || (type >= 0x38 && type <= 0x3C) /* AMD */
++ || (type >= 0x38 && type <= 0x3E) /* AMD */
++ || (type >= 0x46 && type <= 0x49) /* AMD */
+ || (type >= 0x83 && type <= 0x8F) /* AMD */
+ || (type >= 0xB6 && type <= 0xB7) /* AMD */
+ || (type >= 0xE6 && type <= 0xEF)) /* AMD */
+@@ -1143,10 +1150,20 @@ static const char *dmi_processor_upgrade(u8 code)
+ "Socket LGA1156",
+ "Socket LGA1567",
+ "Socket PGA988A",
+- "Socket BGA1288" /* 0x20 */
++ "Socket BGA1288",
++ "Socket rPGA988B",
++ "Socket BGA1023",
++ "Socket BGA1024",
++ "Socket BGA1155",
++ "Socket LGA1356",
++ "Socket LGA2011",
++ "Socket FS1",
++ "Socket FS2",
++ "Socket FM1",
++ "Socket FM2" /* 0x2A */
+ };
+
+- if (code >= 0x01 && code <= 0x20)
++ if (code >= 0x01 && code <= 0x2A)
+ return upgrade[code - 0x01];
+ return out_of_spec;
+ }
+@@ -1493,10 +1510,11 @@ static const char *dmi_cache_associativity(u8 code)
+ "24-way Set-associative",
+ "32-way Set-associative",
+ "48-way Set-associative",
+- "64-way Set-associative" /* 0x0D */
++ "64-way Set-associative",
++ "20-way Set-associative" /* 0x0E */
+ };
+
+- if (code >= 0x01 && code <= 0x0D)
++ if (code >= 0x01 && code <= 0x0E)
+ return type[code - 0x01];
+ return out_of_spec;
+ }
+@@ -1660,12 +1678,18 @@ static const char *dmi_slot_type(u8 code)
+ "PCI Express 2 x2",
+ "PCI Express 2 x4",
+ "PCI Express 2 x8",
+- "PCI Express 2 x16", /* 0xB0 */
++ "PCI Express 2 x16",
++ "PCI Express 3",
++ "PCI Express 3 x1",
++ "PCI Express 3 x2",
++ "PCI Express 3 x4",
++ "PCI Express 3 x8",
++ "PCI Express 3 x16" /* 0xB6 */
+ };
+
+ if (code >= 0x01 && code <= 0x13)
+ return type[code - 0x01];
+- if (code >= 0xA0 && code <= 0xB0)
++ if (code >= 0xA0 && code <= 0xB6)
+ return type_0xA0[code - 0xA0];
+ return out_of_spec;
+ }