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-rw-r--r--Documentation/devicetree/bindings/clock/nexell-pll.txt10
1 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/clock/nexell-pll.txt b/Documentation/devicetree/bindings/clock/nexell-pll.txt
index 61d4b647fe84..d26b9a1f25f0 100644
--- a/Documentation/devicetree/bindings/clock/nexell-pll.txt
+++ b/Documentation/devicetree/bindings/clock/nexell-pll.txt
@@ -1,18 +1,18 @@
-* Nxell s5p16818 PLL Controller
+* Nexell s5pxx18 PLL Controller
-The S5p6818 PLL controller within the s5p6818 SoC.
-S5p6818 support 5 PLLs (PLL0, 1, 2 ,3)
+The S5pxx18 PLL controller within the s5p4418 and s5p6818 SoC.
+S5pxx18 support 5 PLLs (PLL0, 1, 2 ,3)
Required Properties:
-- compatible: should be "nexell,s5p6818-pll".
+- compatible: should be "nexell,s5pxx18-pll".
- ref-freuecny: Input oscillator clock Hz.
- reg: physical base address of the controller and length of memory mapped
region.
Example: An example of a clock controller node is listed below.
refclk:oscillator {
- compatible = "nexell,s5p6818,pll";
+ compatible = "nexell,s5pxx18,pll";
ref-freuecny = <24000000>;
};