From df3c851716424fda0c7b14c4cae71cea467a9944 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 21 Apr 2011 09:08:15 -0700 Subject: gpio/omap: _clear_gpio_irqbank: fix flushing of posted write In commit 78a1a6d3411de1a8b0dc1cb92754b5f12f251912 (ARM: OMAP4: Update the GPIO support) braces were mistakenly added to included the register read-back inside the cpu_is_* checking. Remove the braces, ensuring that a register read-back is done, even when the IRQSTATUS2 register is not written. Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2 depending on the CPU, but a read-back of any register in that region will cause a flush of the posted writes. Signed-off-by: Kevin Hilman --- drivers/gpio/gpio-omap.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers/gpio') diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 01f74a8459d9..2ca814294c5e 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -700,12 +700,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) else if (cpu_is_omap44xx()) reg = bank->base + OMAP4_GPIO_IRQSTATUS1; - if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) { + if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) __raw_writel(gpio_mask, reg); /* Flush posted write for the irq status to avoid spurious interrupts */ __raw_readl(reg); - } } static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) -- cgit v1.2.3