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author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2014-07-10 12:50:56 +0200 |
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committer | Stephane Desneux <stephane.desneux@open.eurogiciel.org> | 2015-02-04 11:16:13 +0100 |
commit | d0b6f13f8fc0bd0833b2a19c39d1fa6a9250bb80 (patch) | |
tree | e2ce21facfcea666d0b209e23bc7c3efa55690a7 /arch | |
parent | 477234fd86b36fa420c27ad2fe6e2d8a95088619 (diff) | |
download | kernel-common-d0b6f13f8fc0bd0833b2a19c39d1fa6a9250bb80.tar.gz kernel-common-d0b6f13f8fc0bd0833b2a19c39d1fa6a9250bb80.tar.bz2 kernel-common-d0b6f13f8fc0bd0833b2a19c39d1fa6a9250bb80.zip |
ARM: shmobile: r8a7790: lager: use iic cores instead of i2c
On Lager board, i2c and iic cores can be interchanged since they can be
muxed to the same wires. Commit e489c2a9bc82713167d9f721ca764f4b0d37e543
("ARM: shmobile: lager: enable i2c devices") activated the i2c cores,
yet the iic cores should be default since they have the more interesting
features for generic use cases, i.e. SMBUS_QUICK and DMA (yet to be
supported).
Reported-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit cb9a2b12e0cb524022c9a81d8ed29f2453ec240d)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/r8a7790-lager.dts | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index d949ff04f2ec..2bff0a756053 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -205,14 +205,14 @@ renesas,function = "msiof1"; }; - i2c1_pins: i2c1 { - renesas,groups = "i2c1"; - renesas,function = "i2c1"; + iic1_pins: iic1 { + renesas,groups = "iic1"; + renesas,function = "iic1"; }; - i2c2_pins: i2c2 { - renesas,groups = "i2c2"; - renesas,function = "i2c2"; + iic2_pins: iic2 { + renesas,groups = "iic2"; + renesas,function = "iic2"; }; iic3_pins: iic3 { @@ -352,19 +352,19 @@ cpu0-supply = <&vdd_dvfs>; }; -&i2c0 { +&iic0 { status = "ok"; }; -&i2c1 { +&iic1 { status = "ok"; - pinctrl-0 = <&i2c1_pins>; + pinctrl-0 = <&iic1_pins>; pinctrl-names = "default"; }; -&i2c2 { +&iic2 { status = "ok"; - pinctrl-0 = <&i2c2_pins>; + pinctrl-0 = <&iic2_pins>; pinctrl-names = "default"; }; |