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author | Olof Johansson <olof@lixom.net> | 2013-05-31 22:20:10 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2013-06-02 11:50:40 -0700 |
commit | 04b5e56fc31bac04517ba7fc801736ba99088082 (patch) | |
tree | 8d6ba5fb703e9c85f7a9ba82da40eb04e112a465 /arch/arm | |
parent | d683b96b072dc4680fc74964eca77e6a23d1fa6e (diff) | |
parent | b60b61d41220c8d34e2c62a748bc78bc5d40585e (diff) | |
download | kernel-common-04b5e56fc31bac04517ba7fc801736ba99088082.tar.gz kernel-common-04b5e56fc31bac04517ba7fc801736ba99088082.tar.bz2 kernel-common-04b5e56fc31bac04517ba7fc801736ba99088082.zip |
Merge tag 'fixes-3.10-3' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper, mvebu fixes for v3.10 round 3:
- mvebu
- fix bug in coherency fabric low level init
- kirkwood
- fix crash from pcie double init
Signed-off-by: Olof Johansson <olof@lixom.net>
* tag 'fixes-3.10-3' of git://git.infradead.org/users/jcooper/linux:
ARM: mvebu: Fix bug in coherency fabric low level init function
ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-kirkwood/board-ts219.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/coherency_ll.S | 16 |
2 files changed, 11 insertions, 15 deletions
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c index acb0187c7ee1..4695d5f35fc9 100644 --- a/arch/arm/mach-kirkwood/board-ts219.c +++ b/arch/arm/mach-kirkwood/board-ts219.c @@ -41,13 +41,3 @@ void __init qnap_dt_ts219_init(void) pm_power_off = qnap_tsx1x_power_off; } - -/* FIXME: Will not work with DT. Maybe use MPP40_GPIO? */ -static int __init ts219_pci_init(void) -{ - if (machine_is_ts219()) - kirkwood_pcie_init(KW_PCIE0); - - return 0; -} -subsys_initcall(ts219_pci_init); diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S index 53e8391192cd..5476669ba905 100644 --- a/arch/arm/mach-mvebu/coherency_ll.S +++ b/arch/arm/mach-mvebu/coherency_ll.S @@ -32,15 +32,21 @@ ENTRY(ll_set_cpu_coherent) /* Add CPU to SMP group - Atomic */ add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET - ldr r2, [r3] +1: + ldrex r2, [r3] orr r2, r2, r1 - str r2, [r3] + strex r0, r2, [r3] + cmp r0, #0 + bne 1b /* Enable coherency on CPU - Atomic */ - add r3, r0, #ARMADA_XP_CFB_CFG_REG_OFFSET - ldr r2, [r3] + add r3, r3, #ARMADA_XP_CFB_CFG_REG_OFFSET +1: + ldrex r2, [r3] orr r2, r2, r1 - str r2, [r3] + strex r0, r2, [r3] + cmp r0, #0 + bne 1b dsb |