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| author | Stefan Roese <sr@denx.de> | 2009-04-16 15:11:54 -0600 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2009-04-16 15:11:54 -0600 |
| commit | c5a88dd90cf243a17c4a8c10e1ed973192ea5825 (patch) | |
| tree | a49dfac872411bdd4824dfe92180f80fa8b95c57 /Documentation | |
| parent | efcc2da3fd148c9acb7d7cf1d9800e0649f950fc (diff) | |
| download | kernel-common-c5a88dd90cf243a17c4a8c10e1ed973192ea5825.tar.gz kernel-common-c5a88dd90cf243a17c4a8c10e1ed973192ea5825.tar.bz2 kernel-common-c5a88dd90cf243a17c4a8c10e1ed973192ea5825.zip | |
powerpc/device-tree: Document MTD nodes with multiple "reg" tuples
Add binding for mtd nodes with multiple reg tuples. Multiple reg tuples
are used when the flash region covers multiple devices of the same type,
but not necessarily the same size.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/powerpc/dts-bindings/mtd-physmap.txt | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/Documentation/powerpc/dts-bindings/mtd-physmap.txt b/Documentation/powerpc/dts-bindings/mtd-physmap.txt index cd474f9aef39..667c9bde8699 100644 --- a/Documentation/powerpc/dts-bindings/mtd-physmap.txt +++ b/Documentation/powerpc/dts-bindings/mtd-physmap.txt @@ -5,7 +5,9 @@ file systems on embedded devices. - compatible : should contain the specific model of flash chip(s) used, if known, followed by either "cfi-flash" or "jedec-flash" - - reg : Address range of the flash chip + - reg : Address range(s) of the flash chip(s) + It's possible to (optionally) define multiple "reg" tuples so that + non-identical NOR chips can be described in one flash node. - bank-width : Width (in bytes) of the flash bank. Equal to the device width times the number of interleaved chips. - device-width : (optional) Width of a single flash chip. If @@ -61,3 +63,18 @@ Example: read-only; }; }; + +Here an example with multiple "reg" tuples: + + flash@f0000000,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "intel,PC48F4400P0VB", "cfi-flash"; + reg = <0 0x00000000 0x02000000 + 0 0x02000000 0x02000000>; + bank-width = <2>; + partition@0 { + label = "test-part1"; + reg = <0 0x04000000>; + }; + }; |