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author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2014-08-05 18:24:30 -0700 |
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committer | Stephane Desneux <stephane.desneux@open.eurogiciel.org> | 2015-02-04 11:16:18 +0100 |
commit | f4919c37989615ad0a5c665de2617802cc15ff75 (patch) | |
tree | ce2810ea44f0d20fb643f8536b5deca5aea22e8b | |
parent | 2fb33ac1bbc39bef58b1f2504a9029a29d42267c (diff) | |
download | kernel-common-f4919c37989615ad0a5c665de2617802cc15ff75.tar.gz kernel-common-f4919c37989615ad0a5c665de2617802cc15ff75.tar.bz2 kernel-common-f4919c37989615ad0a5c665de2617802cc15ff75.zip |
ARM: shmobile: r8a7790: add missing 0x0100 for SDCKCR
9f13ee6f83c52065112d3e396e42e3780911ef53
(ARM: shmobile: r8a7790: add div4 clocks)
added r8a7790 DIV4 clock support.
But, it is missing
"0x0100: x 1/8" division ratio.
This patch fixes hidden bug.
It is based on R-Car H2 v0.7, R-Car M2 v0.9.
Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 4fb12fe9c34928c1d2bed817e144aec3f44540e9)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7790.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index 17435c1aa2fe..126ddafad526 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c @@ -183,8 +183,8 @@ enum { static struct clk div4_clks[DIV4_NR] = { [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT), - [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT), - [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1de0, CLK_ENABLE_ON_INIT), + [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT), + [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1df0, CLK_ENABLE_ON_INIT), }; /* DIV6 clocks */ |