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author | Eric Anholt <eric@anholt.net> | 2009-01-19 14:43:20 -0800 |
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committer | Eric Anholt <eric@anholt.net> | 2009-02-24 12:20:59 -0800 |
commit | 8ef4eb50193a849cb9fd0d7a85c6814e1d473101 (patch) | |
tree | 4b79c4501df9115b5b25db9606c59618e7908e9e | |
parent | c78dd68aec54e0247a9c15b8d3db222b1f9003f6 (diff) | |
download | xf86-video-intel-8ef4eb50193a849cb9fd0d7a85c6814e1d473101.tar.gz xf86-video-intel-8ef4eb50193a849cb9fd0d7a85c6814e1d473101.tar.bz2 xf86-video-intel-8ef4eb50193a849cb9fd0d7a85c6814e1d473101.zip |
Do check_aperture_space and batch_start_atomic for i965 video.
This increases the overhead for video in the presence of cliprects, but we
were already doing nasty things in that case and don't seem to care. This
could fix potential bad rendering or hangs with video, particularly with
DRI2.
(cherry picked from commit 946c7ef8170e74ac178c83b1465242d57fa86f2e)
-rw-r--r-- | src/i965_video.c | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/src/i965_video.c b/src/i965_video.c index 3c626ca43..cd726a283 100644 --- a/src/i965_video.c +++ b/src/i965_video.c @@ -1057,8 +1057,6 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, } } - i965_emit_video_setup(pScrn, bind_bo, n_src_surf); - /* Set up the offset for translating from the given region (in screen * coordinates) to the backing pixmap. */ @@ -1087,12 +1085,25 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, int i; drm_intel_bo *vb_bo; float *vb; + drm_intel_bo *bo_table[] = { + NULL, /* vb_bo */ + pI830->batch_bo, + bind_bo, + pI830->video.gen4_sampler_bo, + pI830->video.gen4_sip_kernel_bo, + pI830->video.gen4_vs_bo, + pI830->video.gen4_sf_bo, + pI830->video.gen4_wm_packed_bo, + pI830->video.gen4_wm_planar_bo, + pI830->video.gen4_cc_bo, + }; pbox++; if (intel_alloc_and_map(pI830, "textured video vb", 4096, &vb_bo, &vb) != 0) break; + bo_table[0] = vb_bo; i = 0; vb[i++] = (box_x2 - dxo) * src_scale_x; @@ -1114,6 +1125,18 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, i965_pre_draw_debug(pScrn); + /* If this command won't fit in the current batch, flush. + * Assume that it does after being flushed. + */ + if (drm_intel_bufmgr_check_aperture_space(bo_table, + ARRAY_SIZE(bo_table)) < 0) { + intel_batch_flush(pScrn, FALSE); + } + + intel_batch_start_atomic(pScrn, 100); + + i965_emit_video_setup(pScrn, bind_bo, n_src_surf); + BEGIN_BATCH(10); /* Set up the pointer to our vertex buffer */ OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 2); @@ -1136,6 +1159,8 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id, OUT_BATCH(0); /* index buffer offset, ignored */ ADVANCE_BATCH(); + intel_batch_end_atomic(pScrn); + drm_intel_bo_unreference(vb_bo); i965_post_draw_debug(pScrn); |