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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-03-08 15:26:24 -0800 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-03-08 15:26:24 -0800 |
| commit | c66d57080dc034aa7877f47612065e388bbc38a2 (patch) | |
| tree | ba44b22d51c6b6b4717fa66b3fe1dea244434b71 | |
| parent | 7845c6ade82085488192bd76729d92fb7b534cc0 (diff) | |
| download | xf86-video-intel-c66d57080dc034aa7877f47612065e388bbc38a2.tar.gz xf86-video-intel-c66d57080dc034aa7877f47612065e388bbc38a2.tar.bz2 xf86-video-intel-c66d57080dc034aa7877f47612065e388bbc38a2.zip | |
DRI2: more WaitMSC fixes
A couple more niggles: make sure we return a target_msc that at least
matches the current count; this is a little more friendly to clients
that missed an event. Also check for >= when calculating the remainder
so we'll catch the *next* vblank event when the calculation is
satisfied, rather than the current one as might happen at times.
Reported-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| -rw-r--r-- | src/i830_dri.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/i830_dri.c b/src/i830_dri.c index a81eada88..e8f242473 100644 --- a/src/i830_dri.c +++ b/src/i830_dri.c @@ -885,6 +885,14 @@ I830DRI2ScheduleWaitMSC(ClientPtr client, DrawablePtr draw, CARD64 target_msc, * client. */ if (divisor == 0 || current_msc < target_msc) { + /* If target_msc already reached or passed, set it to + * current_msc to ensure we return a reasonable value back + * to the caller. This keeps the client from continually + * sending us MSC targets from the past by forcibly updating + * their count on this call. + */ + if (current_msc >= target_msc) + target_msc = current_msc; vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT; if (pipe > 0) vbl.request.type |= DRM_VBLANK_SECONDARY; @@ -919,7 +927,7 @@ I830DRI2ScheduleWaitMSC(ClientPtr client, DrawablePtr draw, CARD64 target_msc, * seq % divisor == remainder, so we need to wait for the next time * that will happen. */ - if ((current_msc % divisor) > remainder) + if ((current_msc % divisor) >= remainder) vbl.request.sequence += divisor; vbl.request.signal = (unsigned long)wait_info; |