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Diffstat (limited to 'target-microblaze/cpu.h')
-rw-r--r--target-microblaze/cpu.h13
1 files changed, 6 insertions, 7 deletions
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 7508cf5a0..6ccd06068 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -48,6 +48,10 @@ typedef struct CPUMBState CPUMBState;
/* MicroBlaze-specific interrupt pending bits. */
#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
+/* Meanings of the MBCPU object's two inbound GPIO lines */
+#define MB_CPU_IRQ 0
+#define MB_CPU_FIR 1
+
/* Register aliases. R0 - R15 */
#define R_SP 1
#define SR_PC 0
@@ -246,6 +250,7 @@ struct CPUMBState {
/* lwx/swx reserved address */
#define RES_ADDR_NONE 0xffffffff /* Use 0xffffffff to indicate no reservation */
uint32_t res_addr;
+ uint32_t res_val;
/* Internal flags. */
#define IMM_FLAG 4
@@ -327,9 +332,8 @@ static inline int cpu_mmu_index (CPUMBState *env)
return MMU_KERNEL_IDX;
}
-int cpu_mb_handle_mmu_fault(CPUMBState *env, target_ulong address, int rw,
+int mb_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
int mmu_idx);
-#define cpu_handle_mmu_fault cpu_mb_handle_mmu_fault
static inline int cpu_interrupts_enabled(CPUMBState *env)
{
@@ -358,11 +362,6 @@ void mb_cpu_unassigned_access(CPUState *cpu, hwaddr addr,
unsigned size);
#endif
-static inline bool cpu_has_work(CPUState *cpu)
-{
- return cpu->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
-}
-
#include "exec/exec-all.h"
#endif