diff options
author | Chanho Park <chanho61.park@samsung.com> | 2014-09-05 20:35:53 +0900 |
---|---|---|
committer | Chanho Park <chanho61.park@samsung.com> | 2014-09-05 20:35:53 +0900 |
commit | 16b1353a36171ae06d63fd309f4772dbfb1da113 (patch) | |
tree | cf6c297ee81aba0d9b47f23d78a889667e7bce48 /target-openrisc | |
parent | a15119db2ff5c2fdfdeb913b297bf8aa3399132e (diff) | |
download | qemu-16b1353a36171ae06d63fd309f4772dbfb1da113.tar.gz qemu-16b1353a36171ae06d63fd309f4772dbfb1da113.tar.bz2 qemu-16b1353a36171ae06d63fd309f4772dbfb1da113.zip |
Imported Upstream version 2.1.0upstream/2.1.0
Diffstat (limited to 'target-openrisc')
-rw-r--r-- | target-openrisc/exception_helper.c | 2 | ||||
-rw-r--r-- | target-openrisc/fpu_helper.c | 2 | ||||
-rw-r--r-- | target-openrisc/helper.h | 4 | ||||
-rw-r--r-- | target-openrisc/int_helper.c | 2 | ||||
-rw-r--r-- | target-openrisc/interrupt_helper.c | 2 | ||||
-rw-r--r-- | target-openrisc/machine.c | 2 | ||||
-rw-r--r-- | target-openrisc/mmu_helper.c | 15 | ||||
-rw-r--r-- | target-openrisc/sys_helper.c | 2 | ||||
-rw-r--r-- | target-openrisc/translate.c | 10 |
9 files changed, 11 insertions, 30 deletions
diff --git a/target-openrisc/exception_helper.c b/target-openrisc/exception_helper.c index 0c53b7755..6093953c9 100644 --- a/target-openrisc/exception_helper.c +++ b/target-openrisc/exception_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "exception.h" void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) diff --git a/target-openrisc/fpu_helper.c b/target-openrisc/fpu_helper.c index 4615a366d..c94ed35af 100644 --- a/target-openrisc/fpu_helper.c +++ b/target-openrisc/fpu_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "exception.h" static inline uint32_t ieee_ex_to_openrisc(OpenRISCCPU *cpu, int fexcp) diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h index 2af97901c..f53fa2134 100644 --- a/target-openrisc/helper.h +++ b/target-openrisc/helper.h @@ -17,8 +17,6 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ -#include "exec/def-helper.h" - /* exception */ DEF_HELPER_FLAGS_2(exception, 0, void, env, i32) @@ -66,5 +64,3 @@ DEF_HELPER_FLAGS_1(rfe, 0, void, env) /* sys */ DEF_HELPER_FLAGS_4(mtspr, 0, void, env, tl, tl, tl) DEF_HELPER_FLAGS_4(mfspr, 0, tl, env, tl, tl, tl) - -#include "exec/def-helper.h" diff --git a/target-openrisc/int_helper.c b/target-openrisc/int_helper.c index 16cb5abfc..6e27aebd9 100644 --- a/target-openrisc/int_helper.c +++ b/target-openrisc/int_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "exception.h" #include "qemu/host-utils.h" diff --git a/target-openrisc/interrupt_helper.c b/target-openrisc/interrupt_helper.c index 819405701..55a780c7b 100644 --- a/target-openrisc/interrupt_helper.c +++ b/target-openrisc/interrupt_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" void HELPER(rfe)(CPUOpenRISCState *env) { diff --git a/target-openrisc/machine.c b/target-openrisc/machine.c index 6f864fe7b..9f66a9cef 100644 --- a/target-openrisc/machine.c +++ b/target-openrisc/machine.c @@ -24,7 +24,6 @@ static const VMStateDescription vmstate_env = { .name = "env", .version_id = 1, .minimum_version_id = 1, - .minimum_version_id_old = 1, .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(gpr, CPUOpenRISCState, 32), VMSTATE_UINT32(sr, CPUOpenRISCState), @@ -43,7 +42,6 @@ const VMStateDescription vmstate_openrisc_cpu = { .name = "cpu", .version_id = 1, .minimum_version_id = 1, - .minimum_version_id_old = 1, .fields = (VMStateField[]) { VMSTATE_CPU(), VMSTATE_STRUCT(env, OpenRISCCPU, 1, vmstate_env, CPUOpenRISCState), diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c index fb457c76a..ee1c6f611 100644 --- a/target-openrisc/mmu_helper.c +++ b/target-openrisc/mmu_helper.c @@ -19,22 +19,9 @@ */ #include "cpu.h" +#include "exec/cpu_ldst.h" #ifndef CONFIG_USER_ONLY -#include "exec/softmmu_exec.h" -#define MMUSUFFIX _mmu - -#define SHIFT 0 -#include "exec/softmmu_template.h" - -#define SHIFT 1 -#include "exec/softmmu_template.h" - -#define SHIFT 2 -#include "exec/softmmu_template.h" - -#define SHIFT 3 -#include "exec/softmmu_template.h" void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) diff --git a/target-openrisc/sys_helper.c b/target-openrisc/sys_helper.c index fedcbed4f..53ca6bcef 100644 --- a/target-openrisc/sys_helper.c +++ b/target-openrisc/sys_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #define TO_SPR(group, number) (((group) << 11) + (number)) diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 852b5e610..55ff935d5 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -26,10 +26,10 @@ #include "qemu/log.h" #include "config.h" #include "qemu/bitops.h" +#include "exec/cpu_ldst.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" #define OPENRISC_DISAS @@ -531,14 +531,14 @@ static void dec_calc(DisasContext *dc, uint32_t insn) TCGv_i64 high = tcg_temp_new_i64(); TCGv_i32 sr_ove = tcg_temp_local_new_i32(); int lab = gen_new_label(); - /* Calculate the each result. */ + /* Calculate each result. */ tcg_gen_extu_i32_i64(tra, cpu_R[ra]); tcg_gen_extu_i32_i64(trb, cpu_R[rb]); tcg_gen_mul_i64(result, tra, trb); tcg_temp_free_i64(tra); tcg_temp_free_i64(trb); tcg_gen_shri_i64(high, result, TARGET_LONG_BITS); - /* Overflow or not. */ + /* Overflow or not. */ tcg_gen_brcondi_i64(TCG_COND_EQ, high, 0x00000000, lab); tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE); |