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authorhyokeun <hyokeun.jeon@samsung.com>2016-09-06 14:09:22 +0900
committerhyokeun <hyokeun.jeon@samsung.com>2016-09-06 14:09:22 +0900
commitbd54c25035217800f3b1d39f6472d599cd602d5a (patch)
tree299417fe96f546225439ff92b27ac3e55909a970 /roms/ipxe/src/include/ipxe/pci.h
parent186efde2677c31fb40d154a81a5f3731eab52414 (diff)
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Imported Upstream version 2.7.0upstream/2.7.0
Diffstat (limited to 'roms/ipxe/src/include/ipxe/pci.h')
-rw-r--r--roms/ipxe/src/include/ipxe/pci.h26
1 files changed, 19 insertions, 7 deletions
diff --git a/roms/ipxe/src/include/ipxe/pci.h b/roms/ipxe/src/include/ipxe/pci.h
index a841e00ff..ddd8c8d1e 100644
--- a/roms/ipxe/src/include/ipxe/pci.h
+++ b/roms/ipxe/src/include/ipxe/pci.h
@@ -94,6 +94,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
#define PCI_CAP_ID_VPD 0x03 /**< Vital product data */
#define PCI_CAP_ID_VNDR 0x09 /**< Vendor-specific */
#define PCI_CAP_ID_EXP 0x10 /**< PCI Express */
+#define PCI_CAP_ID_EA 0x14 /**< Enhanced Allocation */
/** Next capability */
#define PCI_CAP_NEXT 0x01
@@ -104,6 +105,10 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
#define PCI_PM_CTRL_PME_ENABLE 0x0100 /**< PME pin enable */
#define PCI_PM_CTRL_PME_STATUS 0x8000 /**< PME pin status */
+/** PCI Express */
+#define PCI_EXP_DEVCTL 0x08
+#define PCI_EXP_DEVCTL_FLR 0x8000 /**< Function level reset */
+
/** Uncorrectable error status */
#define PCI_ERR_UNCOR_STATUS 0x04
@@ -128,6 +133,9 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
( ( ( (base) & 0xff ) << 16 ) | ( ( (sub) & 0xff ) << 8 ) | \
( ( (progif) & 0xff) << 0 ) )
+/** PCI Express function level reset delay (in ms) */
+#define PCI_EXP_FLR_DELAY_MS 100
+
/** A PCI device ID list entry */
struct pci_device_id {
/** Name */
@@ -187,8 +195,8 @@ struct pci_device {
uint32_t class;
/** Interrupt number */
uint8_t irq;
- /** Bus, device, and function (bus:dev.fn) number */
- uint16_t busdevfn;
+ /** Segment, bus, device, and function (bus:dev.fn) number */
+ uint32_t busdevfn;
/** Driver for this device */
struct pci_driver *driver;
/** Driver-private data
@@ -233,11 +241,13 @@ struct pci_driver {
/** Declare a fallback PCI driver */
#define __pci_driver_fallback __table_entry ( PCI_DRIVERS, 02 )
+#define PCI_SEG( busdevfn ) ( ( (busdevfn) >> 16 ) & 0xffff )
#define PCI_BUS( busdevfn ) ( ( (busdevfn) >> 8 ) & 0xff )
#define PCI_SLOT( busdevfn ) ( ( (busdevfn) >> 3 ) & 0x1f )
#define PCI_FUNC( busdevfn ) ( ( (busdevfn) >> 0 ) & 0x07 )
-#define PCI_BUSDEVFN( bus, slot, func ) \
- ( ( (bus) << 8 ) | ( (slot) << 3 ) | ( (func) << 0 ) )
+#define PCI_BUSDEVFN( segment, bus, slot, func ) \
+ ( ( (segment) << 16 ) | ( (bus) << 8 ) | \
+ ( (slot) << 3 ) | ( (func) << 0 ) )
#define PCI_FIRST_FUNC( busdevfn ) ( (busdevfn) & ~0x07 )
#define PCI_LAST_FUNC( busdevfn ) ( (busdevfn) | 0x07 )
@@ -263,12 +273,12 @@ struct pci_driver {
PCI_ID( _vendor, _device, _name, _description, _data )
/** PCI device debug message format */
-#define PCI_FMT "PCI %02x:%02x.%x"
+#define PCI_FMT "%04x:%02x:%02x.%x"
/** PCI device debug message arguments */
#define PCI_ARGS( pci ) \
- PCI_BUS ( (pci)->busdevfn ), PCI_SLOT ( (pci)->busdevfn ), \
- PCI_FUNC ( (pci)->busdevfn )
+ PCI_SEG ( (pci)->busdevfn ), PCI_BUS ( (pci)->busdevfn ), \
+ PCI_SLOT ( (pci)->busdevfn ), PCI_FUNC ( (pci)->busdevfn )
extern void adjust_pci_device ( struct pci_device *pci );
extern unsigned long pci_bar_start ( struct pci_device *pci,
@@ -279,6 +289,8 @@ extern int pci_find_driver ( struct pci_device *pci );
extern int pci_probe ( struct pci_device *pci );
extern void pci_remove ( struct pci_device *pci );
extern int pci_find_capability ( struct pci_device *pci, int capability );
+extern int pci_find_next_capability ( struct pci_device *pci,
+ int pos, int capability );
extern unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg );
/**