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authorYonghee Han <onstudy@samsung.com>2016-07-27 16:39:12 +0900
committerYonghee Han <onstudy@samsung.com>2016-07-27 16:47:03 +0900
commita3b133b0ea0696e42fd876b9a803e28bc6ef5299 (patch)
tree68d7537fb9ede28b2e4d2b9f44eb70988279b8ba /hw/mips
parent0d6a2f7e595218b5632ba7005128470e65138951 (diff)
downloadqemu-a3b133b0ea0696e42fd876b9a803e28bc6ef5299.tar.gz
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Imported Upstream version 2.3.1upstream/2.3.1
Change-Id: I2161522ea1d7ff10cd1d697609d473243c05e1df
Diffstat (limited to 'hw/mips')
-rw-r--r--hw/mips/gt64xxx_pci.c95
-rw-r--r--hw/mips/mips_fulong2e.c15
-rw-r--r--hw/mips/mips_jazz.c45
-rw-r--r--hw/mips/mips_malta.c12
-rw-r--r--hw/mips/mips_mipssim.c5
-rw-r--r--hw/mips/mips_r4k.c28
6 files changed, 111 insertions, 89 deletions
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index 1f2fe5fab..10fcca33f 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -239,7 +239,11 @@ typedef struct GT64120State {
uint32_t regs[GT_REGS];
PCI_MAPPING_ENTRY(PCI0IO);
+ PCI_MAPPING_ENTRY(PCI0M0);
+ PCI_MAPPING_ENTRY(PCI0M1);
PCI_MAPPING_ENTRY(ISD);
+ MemoryRegion pci0_mem;
+ AddressSpace pci0_mem_as;
} GT64120State;
/* Adjust range to avoid touching space which isn't mappable via PCI */
@@ -290,25 +294,63 @@ static void gt64120_isd_mapping(GT64120State *s)
static void gt64120_pci_mapping(GT64120State *s)
{
- /* Update IO mapping */
- if ((s->regs[GT_PCI0IOLD] & 0x7f) <= s->regs[GT_PCI0IOHD])
- {
- /* Unmap old IO address */
- if (s->PCI0IO_length)
- {
- memory_region_del_subregion(get_system_memory(), &s->PCI0IO_mem);
- object_unparent(OBJECT(&s->PCI0IO_mem));
- }
- /* Map new IO address */
- s->PCI0IO_start = s->regs[GT_PCI0IOLD] << 21;
- s->PCI0IO_length = ((s->regs[GT_PCI0IOHD] + 1) - (s->regs[GT_PCI0IOLD] & 0x7f)) << 21;
- isa_mem_base = s->PCI0IO_start;
- if (s->PCI0IO_length) {
- memory_region_init_alias(&s->PCI0IO_mem, OBJECT(s), "isa_mmio",
- get_system_io(), 0, s->PCI0IO_length);
- memory_region_add_subregion(get_system_memory(), s->PCI0IO_start,
- &s->PCI0IO_mem);
- }
+ /* Update PCI0IO mapping */
+ if ((s->regs[GT_PCI0IOLD] & 0x7f) <= s->regs[GT_PCI0IOHD]) {
+ /* Unmap old IO address */
+ if (s->PCI0IO_length) {
+ memory_region_del_subregion(get_system_memory(), &s->PCI0IO_mem);
+ object_unparent(OBJECT(&s->PCI0IO_mem));
+ }
+ /* Map new IO address */
+ s->PCI0IO_start = s->regs[GT_PCI0IOLD] << 21;
+ s->PCI0IO_length = ((s->regs[GT_PCI0IOHD] + 1) -
+ (s->regs[GT_PCI0IOLD] & 0x7f)) << 21;
+ if (s->PCI0IO_length) {
+ memory_region_init_alias(&s->PCI0IO_mem, OBJECT(s), "pci0-io",
+ get_system_io(), 0, s->PCI0IO_length);
+ memory_region_add_subregion(get_system_memory(), s->PCI0IO_start,
+ &s->PCI0IO_mem);
+ }
+ }
+
+ /* Update PCI0M0 mapping */
+ if ((s->regs[GT_PCI0M0LD] & 0x7f) <= s->regs[GT_PCI0M0HD]) {
+ /* Unmap old MEM address */
+ if (s->PCI0M0_length) {
+ memory_region_del_subregion(get_system_memory(), &s->PCI0M0_mem);
+ object_unparent(OBJECT(&s->PCI0M0_mem));
+ }
+ /* Map new mem address */
+ s->PCI0M0_start = s->regs[GT_PCI0M0LD] << 21;
+ s->PCI0M0_length = ((s->regs[GT_PCI0M0HD] + 1) -
+ (s->regs[GT_PCI0M0LD] & 0x7f)) << 21;
+ if (s->PCI0M0_length) {
+ memory_region_init_alias(&s->PCI0M0_mem, OBJECT(s), "pci0-mem0",
+ &s->pci0_mem, s->PCI0M0_start,
+ s->PCI0M0_length);
+ memory_region_add_subregion(get_system_memory(), s->PCI0M0_start,
+ &s->PCI0M0_mem);
+ }
+ }
+
+ /* Update PCI0M1 mapping */
+ if ((s->regs[GT_PCI0M1LD] & 0x7f) <= s->regs[GT_PCI0M1HD]) {
+ /* Unmap old MEM address */
+ if (s->PCI0M1_length) {
+ memory_region_del_subregion(get_system_memory(), &s->PCI0M1_mem);
+ object_unparent(OBJECT(&s->PCI0M1_mem));
+ }
+ /* Map new mem address */
+ s->PCI0M1_start = s->regs[GT_PCI0M1LD] << 21;
+ s->PCI0M1_length = ((s->regs[GT_PCI0M1HD] + 1) -
+ (s->regs[GT_PCI0M1LD] & 0x7f)) << 21;
+ if (s->PCI0M1_length) {
+ memory_region_init_alias(&s->PCI0M1_mem, OBJECT(s), "pci0-mem1",
+ &s->pci0_mem, s->PCI0M1_start,
+ s->PCI0M1_length);
+ memory_region_add_subregion(get_system_memory(), s->PCI0M1_start,
+ &s->PCI0M1_mem);
+ }
}
}
@@ -363,10 +405,12 @@ static void gt64120_writel (void *opaque, hwaddr addr,
case GT_PCI0M0LD:
s->regs[GT_PCI0M0LD] = val & 0x00007fff;
s->regs[GT_PCI0M0REMAP] = val & 0x000007ff;
+ gt64120_pci_mapping(s);
break;
case GT_PCI0M1LD:
s->regs[GT_PCI0M1LD] = val & 0x00007fff;
s->regs[GT_PCI0M1REMAP] = val & 0x000007ff;
+ gt64120_pci_mapping(s);
break;
case GT_PCI1IOLD:
s->regs[GT_PCI1IOLD] = val & 0x00007fff;
@@ -380,12 +424,12 @@ static void gt64120_writel (void *opaque, hwaddr addr,
s->regs[GT_PCI1M1LD] = val & 0x00007fff;
s->regs[GT_PCI1M1REMAP] = val & 0x000007ff;
break;
+ case GT_PCI0M0HD:
+ case GT_PCI0M1HD:
case GT_PCI0IOHD:
s->regs[saddr] = val & 0x0000007f;
gt64120_pci_mapping(s);
break;
- case GT_PCI0M0HD:
- case GT_PCI0M1HD:
case GT_PCI1IOHD:
case GT_PCI1M0HD:
case GT_PCI1M1HD:
@@ -1124,10 +1168,12 @@ PCIBus *gt64120_register(qemu_irq *pic)
qdev_init_nofail(dev);
d = GT64120_PCI_HOST_BRIDGE(dev);
phb = PCI_HOST_BRIDGE(dev);
+ memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX);
+ address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem");
phb->bus = pci_register_bus(dev, "pci",
gt64120_pci_set_irq, gt64120_pci_map_irq,
pic,
- get_system_memory(),
+ &d->pci0_mem,
get_system_io(),
PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-mem", 0x1000);
@@ -1142,11 +1188,6 @@ static int gt64120_init(SysBusDevice *dev)
s = GT64120_PCI_HOST_BRIDGE(dev);
- /* FIXME: This value is computed from registers during reset, but some
- devices (e.g. VGA card) need to know it when they are registered.
- This also mean that changing the register to change the mapping
- does not fully work. */
- isa_mem_base = 0x10000000;
qemu_register_reset(gt64120_reset, s);
return 0;
}
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 6a9ebfa91..4aae64a9e 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -277,7 +277,6 @@ static void mips_fulong2e_init(MachineState *machine)
PCIBus *pci_bus;
ISABus *isa_bus;
I2CBus *smbus;
- int i;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
MIPSCPU *cpu;
CPUMIPSState *env;
@@ -302,8 +301,7 @@ static void mips_fulong2e_init(MachineState *machine)
bios_size = 1024 * 1024;
/* allocate RAM */
- memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size, &error_abort);
- vmstate_register_ram_global(ram);
+ memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);
memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size,
&error_abort);
vmstate_register_ram_global(bios);
@@ -384,15 +382,8 @@ static void mips_fulong2e_init(MachineState *machine)
rtc_init(isa_bus, 2000, NULL);
- for(i = 0; i < MAX_SERIAL_PORTS; i++) {
- if (serial_hds[i]) {
- serial_isa_init(isa_bus, i, serial_hds[i]);
- }
- }
-
- if (parallel_hds[0]) {
- parallel_init(isa_bus, 0, parallel_hds[0]);
- }
+ serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS);
+ parallel_hds_isa_init(isa_bus, 1);
/* Sound card */
audio_init(pci_bus);
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index 3f33093fd..07f3c270d 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -60,13 +60,16 @@ static void main_cpu_reset(void *opaque)
static uint64_t rtc_read(void *opaque, hwaddr addr, unsigned size)
{
- return cpu_inw(0x71);
+ uint8_t val;
+ address_space_read(&address_space_memory, 0x90000071, &val, 1);
+ return val;
}
static void rtc_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
- cpu_outw(0x71, val & 0xff);
+ uint8_t buf = val & 0xff;
+ address_space_write(&address_space_memory, 0x90000071, &buf, 1);
}
static const MemoryRegionOps rtc_ops = {
@@ -120,12 +123,11 @@ static void mips_jazz_do_unassigned_access(CPUState *cpu, hwaddr addr,
(*real_do_unassigned_access)(cpu, addr, is_write, is_exec, opaque, size);
}
-static void mips_jazz_init(MemoryRegion *address_space,
- MemoryRegion *address_space_io,
- ram_addr_t ram_size,
- const char *cpu_model,
+static void mips_jazz_init(MachineState *machine,
enum jazz_model_e jazz_model)
{
+ MemoryRegion *address_space = get_system_memory();
+ const char *cpu_model = machine->cpu_model;
char *filename;
int bios_size, n;
MIPSCPU *cpu;
@@ -134,7 +136,8 @@ static void mips_jazz_init(MemoryRegion *address_space,
qemu_irq *rc4030, *i8259;
rc4030_dma *dmas;
void* rc4030_opaque;
- MemoryRegion *isa = g_new(MemoryRegion, 1);
+ MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
+ MemoryRegion *isa_io = g_new(MemoryRegion, 1);
MemoryRegion *rtc = g_new(MemoryRegion, 1);
MemoryRegion *i8042 = g_new(MemoryRegion, 1);
MemoryRegion *dma_dummy = g_new(MemoryRegion, 1);
@@ -179,8 +182,8 @@ static void mips_jazz_init(MemoryRegion *address_space,
cc->do_unassigned_access = mips_jazz_do_unassigned_access;
/* allocate RAM */
- memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size, &error_abort);
- vmstate_register_ram_global(ram);
+ memory_region_allocate_system_memory(ram, NULL, "mips_jazz.ram",
+ machine->ram_size);
memory_region_add_subregion(address_space, 0, ram);
memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE,
@@ -218,8 +221,14 @@ static void mips_jazz_init(MemoryRegion *address_space,
memory_region_init_io(dma_dummy, NULL, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
+ /* ISA bus: IO space at 0x90000000, mem space at 0x91000000 */
+ memory_region_init(isa_io, NULL, "isa-io", 0x00010000);
+ memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
+ memory_region_add_subregion(address_space, 0x90000000, isa_io);
+ memory_region_add_subregion(address_space, 0x91000000, isa_mem);
+ isa_bus = isa_bus_new(NULL, isa_mem, isa_io);
+
/* ISA devices */
- isa_bus = isa_bus_new(NULL, address_space_io);
i8259 = i8259_init(isa_bus, env->irq[4]);
isa_bus_irqs(isa_bus, i8259);
cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
@@ -227,12 +236,6 @@ static void mips_jazz_init(MemoryRegion *address_space,
pit = pit_init(isa_bus, 0x40, 0, NULL);
pcspk_init(isa_bus, pit);
- /* ISA IO space at 0x90000000 */
- memory_region_init_alias(isa, NULL, "isa_mmio",
- get_system_io(), 0, 0x01000000);
- memory_region_add_subregion(address_space, 0x90000000, isa);
- isa_mem_base = 0x11000000;
-
/* Video card */
switch (jazz_model) {
case JAZZ_MAGNUM:
@@ -333,19 +336,13 @@ static void mips_jazz_init(MemoryRegion *address_space,
static
void mips_magnum_init(MachineState *machine)
{
- ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
- mips_jazz_init(get_system_memory(), get_system_io(),
- ram_size, cpu_model, JAZZ_MAGNUM);
+ mips_jazz_init(machine, JAZZ_MAGNUM);
}
static
void mips_pica61_init(MachineState *machine)
{
- ram_addr_t ram_size = machine->ram_size;
- const char *cpu_model = machine->cpu_model;
- mips_jazz_init(get_system_memory(), get_system_io(),
- ram_size, cpu_model, JAZZ_PICA61);
+ mips_jazz_init(machine, JAZZ_PICA61);
}
static QEMUMachine mips_magnum_machine = {
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 5845158a7..b0fa71a51 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -993,9 +993,8 @@ void mips_malta_init(MachineState *machine)
}
/* register RAM at high address where it is undisturbed by IO */
- memory_region_init_ram(ram_high, NULL, "mips_malta.ram", ram_size,
- &error_abort);
- vmstate_register_ram_global(ram_high);
+ memory_region_allocate_system_memory(ram_high, NULL, "mips_malta.ram",
+ ram_size);
memory_region_add_subregion(system_memory, 0x80000000, ram_high);
/* alias for pre IO hole access */
@@ -1172,10 +1171,9 @@ void mips_malta_init(MachineState *machine)
isa_create_simple(isa_bus, "i8042");
rtc_init(isa_bus, 2000, NULL);
- serial_isa_init(isa_bus, 0, serial_hds[0]);
- serial_isa_init(isa_bus, 1, serial_hds[1]);
- if (parallel_hds[0])
- parallel_init(isa_bus, 0, parallel_hds[0]);
+ serial_hds_isa_init(isa_bus, 2);
+ parallel_hds_isa_init(isa_bus, 1);
+
for(i = 0; i < MAX_FD; i++) {
fd[i] = drive_get(IF_FLOPPY, 0, i);
}
diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
index 5d44c3f73..61f74a631 100644
--- a/hw/mips/mips_mipssim.c
+++ b/hw/mips/mips_mipssim.c
@@ -171,9 +171,8 @@ mips_mipssim_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate RAM. */
- memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size,
- &error_abort);
- vmstate_register_ram_global(ram);
+ memory_region_allocate_system_memory(ram, NULL, "mips_mipssim.ram",
+ ram_size);
memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
&error_abort);
vmstate_register_ram_global(bios);
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index a7fe0cead..66e2a58e8 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -165,7 +165,8 @@ void mips_r4k_init(MachineState *machine)
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios;
MemoryRegion *iomem = g_new(MemoryRegion, 1);
- MemoryRegion *isa = g_new(MemoryRegion, 1);
+ MemoryRegion *isa_io = g_new(MemoryRegion, 1);
+ MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
int bios_size;
MIPSCPU *cpu;
CPUMIPSState *env;
@@ -204,8 +205,7 @@ void mips_r4k_init(MachineState *machine)
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
- memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size, &error_abort);
- vmstate_register_ram_global(ram);
+ memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
memory_region_add_subregion(address_space_mem, 0, ram);
@@ -267,27 +267,23 @@ void mips_r4k_init(MachineState *machine)
cpu_mips_irq_init_cpu(env);
cpu_mips_clock_init(env);
+ /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
+ memory_region_init_alias(isa_io, NULL, "isa-io",
+ get_system_io(), 0, 0x00010000);
+ memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
+ memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
+ memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
+ isa_bus = isa_bus_new(NULL, isa_mem, get_system_io());
+
/* The PIC is attached to the MIPS CPU INT0 pin */
- isa_bus = isa_bus_new(NULL, get_system_io());
i8259 = i8259_init(isa_bus, env->irq[2]);
isa_bus_irqs(isa_bus, i8259);
rtc_init(isa_bus, 2000, NULL);
- /* Register 64 KB of ISA IO space at 0x14000000 */
- memory_region_init_alias(isa, NULL, "isa_mmio",
- get_system_io(), 0, 0x00010000);
- memory_region_add_subregion(get_system_memory(), 0x14000000, isa);
-
- isa_mem_base = 0x10000000;
-
pit = pit_init(isa_bus, 0x40, 0, NULL);
- for(i = 0; i < MAX_SERIAL_PORTS; i++) {
- if (serial_hds[i]) {
- serial_isa_init(isa_bus, i, serial_hds[i]);
- }
- }
+ serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS);
isa_vga_init(isa_bus);