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| author | Anas Nashif <anas.nashif@intel.com> | 2012-11-06 07:10:54 -0800 |
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| committer | Anas Nashif <anas.nashif@intel.com> | 2012-11-06 07:10:54 -0800 |
| commit | ede95f2eabeab645352a36af072ee998c400bca1 (patch) | |
| tree | fcd5dc9c73c1bdc0444deee28a9b329f62a2ed7b /README.arm | |
| download | ppl-ede95f2eabeab645352a36af072ee998c400bca1.tar.gz ppl-ede95f2eabeab645352a36af072ee998c400bca1.tar.bz2 ppl-ede95f2eabeab645352a36af072ee998c400bca1.zip | |
Imported Upstream version 0.11.2upstream/0.11.2upstream
Diffstat (limited to 'README.arm')
| -rw-r--r-- | README.arm | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/README.arm b/README.arm new file mode 100644 index 000000000..552a0b6b2 --- /dev/null +++ b/README.arm @@ -0,0 +1,12 @@ +On the ARM, whether or not the rounding mode can be set in a way that allows +the PPL to work with floating point numbers, will depend on the actual +hardware. However, disabling the affected PPL code at run-time is +impractical. Thus, to ensure that the binary distributions of the PPL for the +ARM work as expected on any hardware, on the ARM, the affected code +is disabled at compile-time. It is still possible to build a binary +for the ARM that assumes the hardware can control the rounding mode; +for this, configure the PPL with `-DPPL_ARM_CAN_CONTROL_FPU=1' included in +CPPFLAGS. +For example: + + CPPFLAGS="-DPPL_ARM_CAN_CONTROL_FPU=1" .../configure ... |