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2014-07-08Fixed #407. Support outputing the CPU corename on runtime.Zhang Xianyi1-0/+9
2014-06-27Remove all trailing whitespace except lapack-netlibTimothy Gu1-15/+15
2014-05-13added ARMV5 as reference platformwernsaar1-0/+16
2013-12-01Merge remote branch 'origin/haswell' into developwernsaar1-0/+15
2013-12-01modified getarch.cwernsaar1-1/+58
2013-08-13Init code base for Intel Haswell.Zhang Xianyi1-0/+15
2013-08-05Enable bulldozer kernels.Zhang Xianyi1-3/+3
2013-07-28Refs #263. Rollback bulldozer and piledriver kernels to barcelona kernels.Zhang Xianyi1-3/+3
2013-07-09Fixed the typo in getarch.cZhang Xianyi1-2/+2
2013-07-09Refs #248. Fixed the LSB compatiable issue for BLAS only.Zhang Xianyi1-1/+3
2013-07-06Support AMD Piledriver by bulldozer kernels.Zhang Xianyi1-0/+17
2013-04-15Added NO_PARALLEL_MAKE flag to disable parallel make.Zhang Xianyi1-0/+4
2013-03-17getarch.c: Minor re-ordering of architecture listExplorer091-1/+1
2013-03-17getarch.c: Minor re-ordering of architecture listExplorer091-12/+14
2012-12-07Added BULLDOZER target. So far it uses barcelona kernels.Zhang Xianyi1-2/+2
2012-12-06Init AMD Bulldozer codebase.Zhang Xianyi1-1/+17
2012-06-25Refs #118. Detect AMD Bulldozer as Barcelona.Xianyi Zhang1-3/+4
2012-05-31Refs #113. Fixed the typo BOBCATE -> BOBCATZhang Xianyi1-6/+6
2012-05-31Refs #113. Support AMD Bobcate using Barcelona kernel codes. Replace 3DNow! w...Zhang Xianyi1-1/+17
2012-03-30Init Sandybridge codes based on Nehalem.Xianyi Zhang1-0/+14
2011-11-09Support detecting ICT Loongson-3B CPU.Xianyi Zhang1-0/+15
2011-09-05refs #55. Added DTB_ENTRIES into dynamic arch setting parameters. Now, it can...traits1-35/+35
2011-04-22Fixed #19. Provided an error msg when the arch is not supported.Xianyi Zhang1-0/+11
2011-01-25fixed a typo.Xianyi Zhang1-1/+2
2011-01-24Added the configures of loongson 3a. refs #1Xianyi Zhang1-1/+48
2011-01-24Import GotoBLAS2 1.13 BSD version codes.Xianyi Zhang1-0/+732
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