Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2021-12-23 | Fixed MSA enabled optimization on Loongson-3A4000 | yuanhecai | 1 | -3/+3 | |
2021-12-16 | move brace inside the ifdef block | Martin Kroeker | 1 | -8/+8 | |
2021-11-13 | get MSA capability from feature flags | Martin Kroeker | 1 | -0/+36 | |
2020-12-09 | Add msa support for loongson | gxw | 1 | -62/+29 | |
1. Using core loongson3r3 and loongson3r4 for loongson 2. Add DYNAMIC_ARCH for loongson Change-Id: I1c6b54dbeca3a0cc31d1222af36a7e9bd6ab54c1 | |||||
2020-09-30 | Change ifdef linux to __linux for C11 compatibility | Martin Kroeker | 1 | -1/+1 | |
2018-12-28 | Update cpuid_mips64.c | TiborGY | 1 | -1/+1 | |
2017-09-22 | Added mips I6500 core | Shivraj Patil | 1 | -1/+16 | |
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> | |||||
2016-07-15 | Added MSA optimization for GEMV_N, GEMV_T, ASUM, DOT functions | Shivraj Patil | 1 | -1/+16 | |
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> | |||||
2016-04-22 | MIPS P5600(32 bit) and I6400(64 bit) cores support added. | Shivraj Patil | 1 | -0/+223 | |
Seperated mips and mips64 files. Configurations support for mips 32 bit. Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> |