1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
|
/* disasm.c where all the _work_ gets done in the Netwide Disassembler
*
* The Netwide Assembler is copyright (C) 1996 Simon Tatham and
* Julian Hall. All rights reserved. The software is
* redistributable under the licence given in the file "Licence"
* distributed in the NASM archive.
*
* initial version 27/iii/95 by Simon Tatham
*/
#include <stdio.h>
#include <string.h>
#include "nasm.h"
#include "disasm.h"
#include "sync.h"
#include "insns.h"
#include "names.c"
extern struct itemplate **itable[];
/*
* Flags that go into the `segment' field of `insn' structures
* during disassembly.
*/
#define SEG_RELATIVE 1
#define SEG_32BIT 2
#define SEG_RMREG 4
#define SEG_DISP8 8
#define SEG_DISP16 16
#define SEG_DISP32 32
#define SEG_NODISP 64
#define SEG_SIGNED 128
static int whichreg(long regflags, int regval) {
static int reg32[] = {
R_EAX, R_ECX, R_EDX, R_EBX, R_ESP, R_EBP, R_ESI, R_EDI };
static int reg16[] = {
R_AX, R_CX, R_DX, R_BX, R_SP, R_BP, R_SI, R_DI };
static int reg8[] = {
R_AL, R_CL, R_DL, R_BL, R_AH, R_CH, R_DH, R_BH };
static int sreg[] = {
R_ES, R_CS, R_SS, R_DS, R_FS, R_GS, 0, 0 };
static int creg[] = {
R_CR0, 0, R_CR2, R_CR3, R_CR4, 0, 0, 0 };
static int dreg[] = {
R_DR0, R_DR1, R_DR2, R_DR3, 0, 0, R_DR6, R_DR7 };
static int treg[] = {
0, 0, 0, R_TR3, R_TR4, R_TR5, R_TR6, R_TR7 };
static int fpureg[] = {
R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7 };
static int mmxreg[] = {
R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7 };
if (!(REG_AL & ~regflags))
return R_AL;
if (!(REG_AX & ~regflags))
return R_AX;
if (!(REG_EAX & ~regflags))
return R_EAX;
if (!(REG_DX & ~regflags))
return R_DX;
if (!(REG_CL & ~regflags))
return R_CL;
if (!(REG_CX & ~regflags))
return R_CX;
if (!(REG_ECX & ~regflags))
return R_ECX;
if (!(REG_CR4 & ~regflags))
return R_CR4;
if (!(FPU0 & ~regflags))
return R_ST0;
if (!(REG_CS & ~regflags))
return R_CS;
if (!((REGMEM|BITS8) & ~regflags))
return reg8[regval];
if (!((REGMEM|BITS16) & ~regflags))
return reg16[regval];
if (!((REGMEM|BITS32) & ~regflags))
return reg32[regval];
if (!(REG_SREG & ~regflags))
return sreg[regval];
if (!(REG_CREG & ~regflags))
return creg[regval];
if (!(REG_DREG & ~regflags))
return dreg[regval];
if (!(REG_TREG & ~regflags))
return treg[regval];
if (!(FPUREG & ~regflags))
return fpureg[regval];
if (!(MMXREG & ~regflags))
return mmxreg[regval];
return 0;
}
static char *whichcond(int condval) {
static int conds[] = {
C_O, C_NO, C_B, C_AE, C_E, C_NE, C_BE, C_A,
C_S, C_NS, C_PE, C_PO, C_L, C_GE, C_LE, C_G
};
return conditions[conds[condval]];
}
/*
* Process an effective address (ModRM) specification.
*/
static unsigned char *do_ea (unsigned char *data, int modrm, int asize,
int segsize, operand *op) {
int mod, rm, scale, index, base;
mod = (modrm >> 6) & 03;
rm = modrm & 07;
if (mod == 3) { /* pure register version */
op->basereg = rm;
op->segment |= SEG_RMREG;
return data;
}
op->addr_size = 0;
if (asize == 16) {
/*
* <mod> specifies the displacement size (none, byte or
* word), and <rm> specifies the register combination.
* Exception: mod=0,rm=6 does not specify [BP] as one might
* expect, but instead specifies [disp16].
*/
op->indexreg = op->basereg = -1;
op->scale = 1; /* always, in 16 bits */
switch (rm) {
case 0: op->basereg = R_BX; op->indexreg = R_SI; break;
case 1: op->basereg = R_BX; op->indexreg = R_DI; break;
case 2: op->basereg = R_BP; op->indexreg = R_SI; break;
case 3: op->basereg = R_BP; op->indexreg = R_DI; break;
case 4: op->basereg = R_SI; break;
case 5: op->basereg = R_DI; break;
case 6: op->basereg = R_BP; break;
case 7: op->basereg = R_BX; break;
}
if (rm == 6 && mod == 0) { /* special case */
op->basereg = -1;
if (segsize != 16)
op->addr_size = 16;
mod = 2; /* fake disp16 */
}
switch (mod) {
case 0:
op->segment |= SEG_NODISP;
break;
case 1:
op->segment |= SEG_DISP8;
op->offset = (signed char) *data++;
break;
case 2:
op->segment |= SEG_DISP16;
op->offset = *data++;
op->offset |= (*data++) << 8;
break;
}
return data;
} else {
/*
* Once again, <mod> specifies displacement size (this time
* none, byte or *dword*), while <rm> specifies the base
* register. Again, [EBP] is missing, replaced by a pure
* disp32 (this time that's mod=0,rm=*5*). However, rm=4
* indicates not a single base register, but instead the
* presence of a SIB byte...
*/
op->indexreg = -1;
switch (rm) {
case 0: op->basereg = R_EAX; break;
case 1: op->basereg = R_ECX; break;
case 2: op->basereg = R_EDX; break;
case 3: op->basereg = R_EBX; break;
case 5: op->basereg = R_EBP; break;
case 6: op->basereg = R_ESI; break;
case 7: op->basereg = R_EDI; break;
}
if (rm == 5 && mod == 0) {
op->basereg = -1;
if (segsize != 32)
op->addr_size = 32;
mod = 2; /* fake disp32 */
}
if (rm == 4) { /* process SIB */
scale = (*data >> 6) & 03;
index = (*data >> 3) & 07;
base = *data & 07;
data++;
op->scale = 1 << scale;
switch (index) {
case 0: op->indexreg = R_EAX; break;
case 1: op->indexreg = R_ECX; break;
case 2: op->indexreg = R_EDX; break;
case 3: op->indexreg = R_EBX; break;
case 4: op->indexreg = -1; break;
case 5: op->indexreg = R_EBP; break;
case 6: op->indexreg = R_ESI; break;
case 7: op->indexreg = R_EDI; break;
}
switch (base) {
case 0: op->basereg = R_EAX; break;
case 1: op->basereg = R_ECX; break;
case 2: op->basereg = R_EDX; break;
case 3: op->basereg = R_EBX; break;
case 4: op->basereg = R_ESP; break;
case 6: op->basereg = R_ESI; break;
case 7: op->basereg = R_EDI; break;
case 5:
if (mod == 0) {
mod = 2;
op->basereg = -1;
} else
op->basereg = R_EBP;
break;
}
}
switch (mod) {
case 0:
op->segment |= SEG_NODISP;
break;
case 1:
op->segment |= SEG_DISP8;
op->offset = (signed char) *data++;
break;
case 2:
op->segment |= SEG_DISP32;
op->offset = *data++;
op->offset |= (*data++) << 8;
op->offset |= ((long) *data++) << 16;
op->offset |= ((long) *data++) << 24;
break;
}
return data;
}
}
/*
* Determine whether the code string in r corresponds to the data
* stream in data. Return the number of bytes matched if so.
*/
static int matches (unsigned char *r, unsigned char *data, int asize,
int osize, int segsize, insn *ins) {
unsigned char *origdata = data;
int a_used = FALSE, o_used = FALSE;
while (*r) {
int c = *r++;
if (c >= 01 && c <= 03) {
while (c--)
if (*r++ != *data++)
return FALSE;
}
if (c == 04) {
switch (*data++) {
case 0x07: ins->oprs[0].basereg = 0; break;
case 0x17: ins->oprs[0].basereg = 2; break;
case 0x1F: ins->oprs[0].basereg = 3; break;
default: return FALSE;
}
}
if (c == 05) {
switch (*data++) {
case 0xA1: ins->oprs[0].basereg = 4; break;
case 0xA9: ins->oprs[0].basereg = 5; break;
default: return FALSE;
}
}
if (c == 06) {
switch (*data++) {
case 0x06: ins->oprs[0].basereg = 0; break;
case 0x0E: ins->oprs[0].basereg = 1; break;
case 0x16: ins->oprs[0].basereg = 2; break;
case 0x1E: ins->oprs[0].basereg = 3; break;
default: return FALSE;
}
}
if (c == 07) {
switch (*data++) {
case 0xA0: ins->oprs[0].basereg = 4; break;
case 0xA8: ins->oprs[0].basereg = 5; break;
default: return FALSE;
}
}
if (c >= 010 && c <= 012) {
int t = *r++, d = *data++;
if (d < t || d > t+7)
return FALSE;
else {
ins->oprs[c-010].basereg = d-t;
ins->oprs[c-010].segment |= SEG_RMREG;
}
}
if (c == 017)
if (*data++)
return FALSE;
if (c >= 014 && c <= 016) {
ins->oprs[c-014].offset = (signed char) *data++;
ins->oprs[c-014].segment |= SEG_SIGNED;
}
if (c >= 020 && c <= 022)
ins->oprs[c-020].offset = *data++;
if (c >= 024 && c <= 026)
ins->oprs[c-024].offset = *data++;
if (c >= 030 && c <= 032) {
ins->oprs[c-030].offset = *data++;
ins->oprs[c-030].offset |= (*data++ << 8);
}
if (c >= 034 && c <= 036) {
ins->oprs[c-034].offset = *data++;
ins->oprs[c-034].offset |= (*data++ << 8);
if (asize == 32) {
ins->oprs[c-034].offset |= (((long) *data++) << 16);
ins->oprs[c-034].offset |= (((long) *data++) << 24);
}
if (segsize != asize)
ins->oprs[c-034].addr_size = asize;
}
if (c >= 040 && c <= 042) {
ins->oprs[c-040].offset = *data++;
ins->oprs[c-040].offset |= (*data++ << 8);
ins->oprs[c-040].offset |= (((long) *data++) << 16);
ins->oprs[c-040].offset |= (((long) *data++) << 24);
}
if (c >= 050 && c <= 052) {
ins->oprs[c-050].offset = (signed char) *data++;
ins->oprs[c-050].segment |= SEG_RELATIVE;
}
if (c >= 060 && c <= 062) {
ins->oprs[c-060].offset = *data++;
ins->oprs[c-060].offset |= (*data++ << 8);
ins->oprs[c-060].segment |= SEG_RELATIVE;
ins->oprs[c-060].segment &= ~SEG_32BIT;
}
if (c >= 064 && c <= 066) {
ins->oprs[c-064].offset = *data++;
ins->oprs[c-064].offset |= (*data++ << 8);
if (asize == 32) {
ins->oprs[c-064].offset |= (((long) *data++) << 16);
ins->oprs[c-064].offset |= (((long) *data++) << 24);
ins->oprs[c-064].segment |= SEG_32BIT;
} else
ins->oprs[c-064].segment &= ~SEG_32BIT;
ins->oprs[c-064].segment |= SEG_RELATIVE;
if (segsize != asize)
ins->oprs[c-064].addr_size = asize;
}
if (c >= 070 && c <= 072) {
ins->oprs[c-070].offset = *data++;
ins->oprs[c-070].offset |= (*data++ << 8);
ins->oprs[c-070].offset |= (((long) *data++) << 16);
ins->oprs[c-070].offset |= (((long) *data++) << 24);
ins->oprs[c-070].segment |= SEG_32BIT | SEG_RELATIVE;
}
if (c >= 0100 && c <= 0177) {
int modrm = *data++;
ins->oprs[c & 07].basereg = (modrm >> 3) & 07;
ins->oprs[c & 07].segment |= SEG_RMREG;
data = do_ea (data, modrm, asize, segsize,
&ins->oprs[(c >> 3) & 07]);
}
if (c >= 0200 && c <= 0277) {
int modrm = *data++;
if (((modrm >> 3) & 07) != (c & 07))
return FALSE; /* spare field doesn't match up */
data = do_ea (data, modrm, asize, segsize,
&ins->oprs[(c >> 3) & 07]);
}
if (c >= 0300 && c <= 0302) {
if (asize)
ins->oprs[c-0300].segment |= SEG_32BIT;
else
ins->oprs[c-0300].segment &= ~SEG_32BIT;
a_used = TRUE;
}
if (c == 0310) {
if (asize == 32)
return FALSE;
else
a_used = TRUE;
}
if (c == 0311) {
if (asize == 16)
return FALSE;
else
a_used = TRUE;
}
if (c == 0312) {
if (asize != segsize)
return FALSE;
else
a_used = TRUE;
}
if (c == 0320) {
if (osize == 32)
return FALSE;
else
o_used = TRUE;
}
if (c == 0321) {
if (osize == 16)
return FALSE;
else
o_used = TRUE;
}
if (c == 0322) {
if (osize != segsize)
return FALSE;
else
o_used = TRUE;
}
if (c == 0330) {
int t = *r++, d = *data++;
if (d < t || d > t+15)
return FALSE;
else
ins->condition = d - t;
}
}
/*
* Check for unused a/o prefixes.
*/
ins->nprefix = 0;
if (!a_used && asize != segsize)
ins->prefixes[ins->nprefix++] = (asize == 16 ? P_A16 : P_A32);
if (!o_used && osize != segsize)
ins->prefixes[ins->nprefix++] = (osize == 16 ? P_O16 : P_O32);
return data - origdata;
}
long disasm (unsigned char *data, char *output, int segsize, long offset,
int autosync) {
struct itemplate **p;
int length = 0;
char *segover;
int rep, lock, asize, osize, i, slen, colon;
unsigned char *origdata;
int works;
insn ins;
/*
* Scan for prefixes.
*/
asize = osize = segsize;
segover = NULL;
rep = lock = 0;
origdata = data;
for (;;) {
if (*data == 0xF3 || *data == 0xF2)
rep = *data++;
else if (*data == 0xF0)
lock = *data++;
else if (*data == 0x2E || *data == 0x36 || *data == 0x3E ||
*data == 0x26 || *data == 0x64 || *data == 0x65) {
switch (*data++) {
case 0x2E: segover = "cs"; break;
case 0x36: segover = "ss"; break;
case 0x3E: segover = "ds"; break;
case 0x26: segover = "es"; break;
case 0x64: segover = "fs"; break;
case 0x65: segover = "gs"; break;
}
} else if (*data == 0x66)
osize = 48 - segsize, data++;
else if (*data == 0x67)
asize = 48 - segsize, data++;
else
break;
}
ins.oprs[0].segment = ins.oprs[1].segment = ins.oprs[2].segment =
ins.oprs[0].addr_size = ins.oprs[1].addr_size = ins.oprs[2].addr_size =
(segsize == 16 ? 0 : SEG_32BIT);
ins.condition = -1;
works = TRUE;
for (p = itable[*data]; *p; p++)
if ( (length = matches((unsigned char *)((*p)->code), data,
asize, osize, segsize, &ins)) ) {
works = TRUE;
/*
* Final check to make sure the types of r/m match up.
*/
for (i = 0; i < (*p)->operands; i++)
if (((ins.oprs[i].segment & SEG_RMREG) &&
!(MEMORY & ~(*p)->opd[i])) ||
(!(ins.oprs[i].segment & SEG_RMREG) &&
!(REGNORM & ~(*p)->opd[i]) &&
!((*p)->opd[i] & REG_SMASK)))
works = FALSE;
if (works)
break;
}
if (!length || !works)
return 0; /* no instruction was matched */
slen = 0;
if (rep) {
slen += sprintf(output+slen, "rep%s ",
(rep == 0xF2 ? "ne" :
(*p)->opcode == I_CMPSB ||
(*p)->opcode == I_CMPSW ||
(*p)->opcode == I_CMPSD ||
(*p)->opcode == I_SCASB ||
(*p)->opcode == I_SCASW ||
(*p)->opcode == I_SCASD ? "e" : ""));
}
if (lock)
slen += sprintf(output+slen, "lock ");
for (i = 0; i < ins.nprefix; i++)
switch (ins.prefixes[i]) {
case P_A16: slen += sprintf(output+slen, "a16 "); break;
case P_A32: slen += sprintf(output+slen, "a32 "); break;
case P_O16: slen += sprintf(output+slen, "o16 "); break;
case P_O32: slen += sprintf(output+slen, "o32 "); break;
}
for (i = 0; i < elements(ico); i++)
if ((*p)->opcode == ico[i]) {
slen += sprintf(output+slen, "%s%s", icn[i],
whichcond(ins.condition));
break;
}
if (i >= elements(ico))
slen += sprintf(output+slen, "%s", insn_names[(*p)->opcode]);
colon = FALSE;
length += data - origdata; /* fix up for prefixes */
for (i=0; i<(*p)->operands; i++) {
output[slen++] = (colon ? ':' : i==0 ? ' ' : ',');
if (ins.oprs[i].segment & SEG_RELATIVE) {
ins.oprs[i].offset += offset + length;
/*
* sort out wraparound
*/
if (!(ins.oprs[i].segment & SEG_32BIT))
ins.oprs[i].offset &= 0xFFFF;
/*
* add sync marker, if autosync is on
*/
if (autosync)
add_sync (ins.oprs[i].offset, 0L);
}
if ((*p)->opd[i] & COLON)
colon = TRUE;
else
colon = FALSE;
if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
(ins.oprs[i].segment & SEG_RMREG)) {
ins.oprs[i].basereg = whichreg ((*p)->opd[i],
ins.oprs[i].basereg);
slen += sprintf(output+slen, "%s",
reg_names[ins.oprs[i].basereg]);
} else if (!(UNITY & ~(*p)->opd[i])) {
output[slen++] = '1';
} else if ( (*p)->opd[i] & IMMEDIATE ) {
if ( (*p)->opd[i] & BITS8 ) {
slen += sprintf(output+slen, "byte ");
if (ins.oprs[i].segment & SEG_SIGNED) {
if (ins.oprs[i].offset < 0) {
ins.oprs[i].offset *= -1;
output[slen++] = '-';
} else
output[slen++] = '+';
}
} else if ( (*p)->opd[i] & BITS16 ) {
slen += sprintf(output+slen, "word ");
} else if ( (*p)->opd[i] & BITS32 ) {
slen += sprintf(output+slen, "dword ");
} else if ( (*p)->opd[i] & NEAR ) {
slen += sprintf(output+slen, "near ");
} else if ( (*p)->opd[i] & SHORT ) {
slen += sprintf(output+slen, "short ");
}
slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
} else if ( !(MEM_OFFS & ~(*p)->opd[i]) ) {
slen += sprintf(output+slen, "[%s%s%s0x%lx]",
(segover ? segover : ""),
(segover ? ":" : ""),
(ins.oprs[i].addr_size == 32 ? "dword " :
ins.oprs[i].addr_size == 16 ? "word " : ""),
ins.oprs[i].offset);
segover = NULL;
} else if ( !(REGMEM & ~(*p)->opd[i]) ) {
int started = FALSE;
if ( (*p)->opd[i] & BITS8 )
slen += sprintf(output+slen, "byte ");
if ( (*p)->opd[i] & BITS16 )
slen += sprintf(output+slen, "word ");
if ( (*p)->opd[i] & BITS32 )
slen += sprintf(output+slen, "dword ");
if ( (*p)->opd[i] & BITS64 )
slen += sprintf(output+slen, "qword ");
if ( (*p)->opd[i] & BITS80 )
slen += sprintf(output+slen, "tword ");
if ( (*p)->opd[i] & FAR )
slen += sprintf(output+slen, "far ");
if ( (*p)->opd[i] & NEAR )
slen += sprintf(output+slen, "near ");
output[slen++] = '[';
if (ins.oprs[i].addr_size)
slen += sprintf(output+slen, "%s",
(ins.oprs[i].addr_size == 32 ? "dword " :
ins.oprs[i].addr_size == 16 ? "word " : ""));
if (segover) {
slen += sprintf(output+slen, "%s:", segover);
segover = NULL;
}
if (ins.oprs[i].basereg != -1) {
slen += sprintf(output+slen, "%s",
reg_names[ins.oprs[i].basereg]);
started = TRUE;
}
if (ins.oprs[i].indexreg != -1) {
if (started)
output[slen++] = '+';
slen += sprintf(output+slen, "%s",
reg_names[ins.oprs[i].indexreg]);
if (ins.oprs[i].scale > 1)
slen += sprintf(output+slen, "*%d", ins.oprs[i].scale);
started = TRUE;
}
if (ins.oprs[i].segment & SEG_DISP8) {
int sign = '+';
if (ins.oprs[i].offset & 0x80) {
ins.oprs[i].offset = - (signed char) ins.oprs[i].offset;
sign = '-';
}
slen += sprintf(output+slen, "%c0x%lx", sign,
ins.oprs[i].offset);
} else if (ins.oprs[i].segment & SEG_DISP16) {
if (started)
output[slen++] = '+';
slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
} else if (ins.oprs[i].segment & SEG_DISP32) {
if (started)
output[slen++] = '+';
slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
}
output[slen++] = ']';
} else {
slen += sprintf(output+slen, "<operand%d>", i);
}
}
output[slen] = '\0';
if (segover) { /* unused segment override */
char *p = output;
int count = slen+1;
while (count--)
p[count+3] = p[count];
strncpy (output, segover, 2);
output[2] = ' ';
}
return length;
}
long eatbyte (unsigned char *data, char *output) {
sprintf(output, "db 0x%02X", *data);
return 1;
}
|